37 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_GCTL,  in hda_dsp_ctrl_link_reset()
43 		gctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_GCTL);  in hda_dsp_ctrl_link_reset()
61 	offset = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_LLCH);  in hda_dsp_ctrl_get_caps()
64 		cap = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, offset);  in hda_dsp_ctrl_get_caps()
150 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_EM2,  in hda_dsp_ctrl_clock_power_gating()
214 		snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,  in hda_dsp_ctrl_init_chip()
220 	snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_WAKESTS,  in hda_dsp_ctrl_init_chip()
229 	snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS,  in hda_dsp_ctrl_init_chip()
238 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,  in hda_dsp_ctrl_init_chip()
244 		snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_ADSP_DPLBASE,  in hda_dsp_ctrl_init_chip()
246 		snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_ADSP_DPUBASE,  in hda_dsp_ctrl_init_chip()
275 		snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,  in hda_dsp_ctrl_stop_chip()
283 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,  in hda_dsp_ctrl_stop_chip()
287 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,  in hda_dsp_ctrl_stop_chip()
294 		snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,  in hda_dsp_ctrl_stop_chip()
300 	snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_WAKESTS,  in hda_dsp_ctrl_stop_chip()
309 	snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS,  in hda_dsp_ctrl_stop_chip()
318 		snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,  in hda_dsp_ctrl_stop_chip()
320 		snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,  in hda_dsp_ctrl_stop_chip()