59 #define BYT_DSP_BAR		0  macro
64 	{"dmac0", BYT_DSP_BAR, DMAC0_OFFSET, DMAC_SIZE,
66 	{"dmac1", BYT_DSP_BAR,  DMAC1_OFFSET, DMAC_SIZE,
68 	{"ssp0",  BYT_DSP_BAR, SSP0_OFFSET, SSP_SIZE,
70 	{"ssp1", BYT_DSP_BAR, SSP1_OFFSET, SSP_SIZE,
72 	{"ssp2", BYT_DSP_BAR, SSP2_OFFSET, SSP_SIZE,
74 	{"iram", BYT_DSP_BAR, IRAM_OFFSET, IRAM_SIZE,
76 	{"dram", BYT_DSP_BAR, DRAM_OFFSET, DRAM_SIZE,
78 	{"shim", BYT_DSP_BAR, SHIM_OFFSET, SHIM_SIZE,
83 	{"dmac0", BYT_DSP_BAR, DMAC0_OFFSET, DMAC_SIZE,
85 	{"dmac1", BYT_DSP_BAR,  DMAC1_OFFSET, DMAC_SIZE,
87 	{"dmac2", BYT_DSP_BAR,  DMAC2_OFFSET, DMAC_SIZE,
89 	{"ssp0",  BYT_DSP_BAR, SSP0_OFFSET, SSP_SIZE,
91 	{"ssp1", BYT_DSP_BAR, SSP1_OFFSET, SSP_SIZE,
93 	{"ssp2", BYT_DSP_BAR, SSP2_OFFSET, SSP_SIZE,
95 	{"ssp3", BYT_DSP_BAR, SSP3_OFFSET, SSP_SIZE,
97 	{"ssp4", BYT_DSP_BAR, SSP4_OFFSET, SSP_SIZE,
99 	{"ssp5", BYT_DSP_BAR, SSP5_OFFSET, SSP_SIZE,
101 	{"iram", BYT_DSP_BAR, IRAM_OFFSET, IRAM_SIZE,
103 	{"dram", BYT_DSP_BAR, DRAM_OFFSET, DRAM_SIZE,
105 	{"shim", BYT_DSP_BAR, SHIM_OFFSET, SHIM_SIZE,
151 	status = snd_sof_dsp_read(sdev, BYT_DSP_BAR, SHIM_IPCD);  in byt_dump()
152 	panic = snd_sof_dsp_read(sdev, BYT_DSP_BAR, SHIM_IPCX);  in byt_dump()
170 	isr = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_ISRX);  in byt_irq_handler()
183 	imrx = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IMRX);  in byt_irq_thread()
184 	ipcx = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IPCX);  in byt_irq_thread()
190 		snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR,  in byt_irq_thread()
213 	ipcd = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IPCD);  in byt_irq_thread()
217 		snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR,  in byt_irq_thread()
241 	snd_sof_dsp_write64(sdev, BYT_DSP_BAR, SHIM_IPCX, SHIM_BYT_IPCX_BUSY);  in byt_send_msg()
298 	snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR, SHIM_IPCD,  in byt_host_done()
304 	snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR, SHIM_IMRX,  in byt_host_done()
311 	snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR, SHIM_IPCX,  in byt_dsp_done()
315 	snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR, SHIM_IMRX,  in byt_dsp_done()
328 	snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_CSR,  in byt_run()
331 		if (!(snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_CSR) &  in byt_run()
349 	snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_CSR,  in byt_reset()
358 	snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_CSR,  in byt_reset()
412 	sdev->bar[BYT_DSP_BAR] = devm_ioremap(sdev->dev, base, size);  in tangier_pci_probe()
413 	if (!sdev->bar[BYT_DSP_BAR]) {  in tangier_pci_probe()
418 	dev_dbg(sdev->dev, "LPE VADDR %p\n", sdev->bar[BYT_DSP_BAR]);  in tangier_pci_probe()
456 	snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_IMRX, 0x3, 0x0);  in tangier_pci_probe()
457 	snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_IMRD, 0x3, 0x0);  in tangier_pci_probe()
557 	sdev->bar[BYT_DSP_BAR] = devm_ioremap(sdev->dev, base, size);  in byt_acpi_probe()
558 	if (!sdev->bar[BYT_DSP_BAR]) {  in byt_acpi_probe()
563 	dev_dbg(sdev->dev, "LPE VADDR %p\n", sdev->bar[BYT_DSP_BAR]);  in byt_acpi_probe()
566 	sdev->mmio_bar = BYT_DSP_BAR;  in byt_acpi_probe()
567 	sdev->mailbox_bar = BYT_DSP_BAR;  in byt_acpi_probe()
616 	snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_IMRX, 0x3, 0x0);  in byt_acpi_probe()
617 	snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_IMRD, 0x3, 0x0);  in byt_acpi_probe()