Lines Matching refs:fll_div
685 static int fll_factors(struct _fll_div *fll_div, unsigned int Fref, in fll_factors() argument
714 fll_div->fllclk_div = div >> 2; in fll_factors()
717 fll_div->fll_slow_lock_ref = 1; in fll_factors()
719 fll_div->fll_slow_lock_ref = 0; in fll_factors()
724 fll_div->fll_ratio = 8; in fll_factors()
726 fll_div->fll_ratio = 1; in fll_factors()
728 fll_div->n = Ndiv / fll_div->fll_ratio; in fll_factors()
729 Nmod = (target / fll_div->fll_ratio) % Fref; in fll_factors()
742 fll_div->k = K / 10; in fll_factors()
744 if (WARN_ON(target != Fout * (fll_div->fllclk_div << 2)) || in fll_factors()
745 WARN_ON(!K && target != Fref * fll_div->fll_ratio * fll_div->n)) in fll_factors()
755 struct _fll_div fll_div; in wm8900_set_fll() local
776 if (fll_factors(&fll_div, freq_in, freq_out) != 0) in wm8900_set_fll()
785 fll_div.fll_ratio | WM8900_REG_FLLCTL1_OSC_ENA); in wm8900_set_fll()
787 snd_soc_component_write(component, WM8900_REG_FLLCTL4, fll_div.n >> 5); in wm8900_set_fll()
789 (fll_div.fllclk_div << 6) | (fll_div.n & 0x1f)); in wm8900_set_fll()
791 if (fll_div.k) { in wm8900_set_fll()
793 (fll_div.k >> 8) | 0x100); in wm8900_set_fll()
794 snd_soc_component_write(component, WM8900_REG_FLLCTL3, fll_div.k & 0xff); in wm8900_set_fll()
798 if (fll_div.fll_slow_lock_ref) in wm8900_set_fll()