Lines Matching refs:SGTL5000_CHIP_ANA_POWER
183 if (snd_soc_component_read32(component, SGTL5000_CHIP_ANA_POWER) & in vag_power_on()
187 snd_soc_component_update_bits(component, SGTL5000_CHIP_ANA_POWER, in vag_power_on()
229 SGTL5000_CHIP_ANA_POWER); in vag_power_off()
248 snd_soc_component_update_bits(component, SGTL5000_CHIP_ANA_POWER, in vag_power_off()
443 SND_SOC_DAPM_PGA_E("HP", SGTL5000_CHIP_ANA_POWER, 4, 0, NULL, 0,
447 SND_SOC_DAPM_PGA("LO", SGTL5000_CHIP_ANA_POWER, 0, 0, NULL, 0),
467 SND_SOC_DAPM_ADC_E("ADC", "Capture", SGTL5000_CHIP_ANA_POWER, 1, 0,
470 SND_SOC_DAPM_DAC_E("DAC", "Playback", SGTL5000_CHIP_ANA_POWER, 3, 0,
1024 snd_soc_component_update_bits(component, SGTL5000_CHIP_ANA_POWER, in sgtl5000_set_clock()
1035 snd_soc_component_update_bits(component, SGTL5000_CHIP_ANA_POWER, in sgtl5000_set_clock()
1070 snd_soc_component_update_bits(component, SGTL5000_CHIP_ANA_POWER, stereo, in sgtl5000_pcm_hw_params()
1142 snd_soc_component_update_bits(component, SGTL5000_CHIP_ANA_POWER, in sgtl5000_set_bias_level()
1148 snd_soc_component_update_bits(component, SGTL5000_CHIP_ANA_POWER, in sgtl5000_set_bias_level()
1223 case SGTL5000_CHIP_ANA_POWER: in sgtl5000_readable()
1328 ana_pwr = snd_soc_component_read32(component, SGTL5000_CHIP_ANA_POWER); in sgtl5000_set_power_regs()
1356 snd_soc_component_write(component, SGTL5000_CHIP_ANA_POWER, ana_pwr); in sgtl5000_set_power_regs()
1671 ret = regmap_write(sgtl5000->regmap, SGTL5000_CHIP_ANA_POWER, ana_pwr); in sgtl5000_i2c_probe()