Lines Matching refs:component
309 static void m98088_eq_band(struct snd_soc_component *component, unsigned int dai, in m98088_eq_band() argument
327 snd_soc_component_write(component, eq_reg++, M98088_BYTE1(coefs[i])); in m98088_eq_band()
328 snd_soc_component_write(component, eq_reg++, M98088_BYTE0(coefs[i])); in m98088_eq_band()
382 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_mic1pre_set() local
383 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_mic1pre_set()
387 snd_soc_component_update_bits(component, M98088_REG_35_LVL_MIC1, M98088_MICPRE_MASK, in max98088_mic1pre_set()
396 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_mic1pre_get() local
397 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_mic1pre_get()
406 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_mic2pre_set() local
407 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_mic2pre_set()
411 snd_soc_component_update_bits(component, M98088_REG_36_LVL_MIC2, M98088_MICPRE_MASK, in max98088_mic2pre_set()
420 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_mic2pre_get() local
421 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_mic2pre_get()
619 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in max98088_mic_event() local
620 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_mic_event()
625 snd_soc_component_update_bits(component, w->reg, M98088_MICPRE_MASK, in max98088_mic_event()
628 snd_soc_component_update_bits(component, w->reg, M98088_MICPRE_MASK, in max98088_mic_event()
633 snd_soc_component_update_bits(component, w->reg, M98088_MICPRE_MASK, 0); in max98088_mic_event()
649 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in max98088_line_pga() local
650 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_line_pga()
670 snd_soc_component_update_bits(component, w->reg, in max98088_line_pga()
676 snd_soc_component_update_bits(component, w->reg, in max98088_line_pga()
965 struct snd_soc_component *component = dai->component; in max98088_dai1_hw_params() local
966 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_dai1_hw_params()
978 snd_soc_component_update_bits(component, M98088_REG_14_DAI1_FORMAT, in max98088_dai1_hw_params()
982 snd_soc_component_update_bits(component, M98088_REG_14_DAI1_FORMAT, in max98088_dai1_hw_params()
989 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, 0); in max98088_dai1_hw_params()
994 snd_soc_component_update_bits(component, M98088_REG_11_DAI1_CLKMODE, in max98088_dai1_hw_params()
999 if (snd_soc_component_read32(component, M98088_REG_14_DAI1_FORMAT) in max98088_dai1_hw_params()
1002 dev_err(component->dev, "Invalid system clock frequency\n"); in max98088_dai1_hw_params()
1008 snd_soc_component_write(component, M98088_REG_12_DAI1_CLKCFG_HI, in max98088_dai1_hw_params()
1010 snd_soc_component_write(component, M98088_REG_13_DAI1_CLKCFG_LO, in max98088_dai1_hw_params()
1016 snd_soc_component_update_bits(component, M98088_REG_18_DAI1_FILTERS, in max98088_dai1_hw_params()
1019 snd_soc_component_update_bits(component, M98088_REG_18_DAI1_FILTERS, in max98088_dai1_hw_params()
1022 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, in max98088_dai1_hw_params()
1032 struct snd_soc_component *component = dai->component; in max98088_dai2_hw_params() local
1033 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_dai2_hw_params()
1045 snd_soc_component_update_bits(component, M98088_REG_1C_DAI2_FORMAT, in max98088_dai2_hw_params()
1049 snd_soc_component_update_bits(component, M98088_REG_1C_DAI2_FORMAT, in max98088_dai2_hw_params()
1056 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, 0); in max98088_dai2_hw_params()
1061 snd_soc_component_update_bits(component, M98088_REG_19_DAI2_CLKMODE, in max98088_dai2_hw_params()
1066 if (snd_soc_component_read32(component, M98088_REG_1C_DAI2_FORMAT) in max98088_dai2_hw_params()
1069 dev_err(component->dev, "Invalid system clock frequency\n"); in max98088_dai2_hw_params()
1075 snd_soc_component_write(component, M98088_REG_1A_DAI2_CLKCFG_HI, in max98088_dai2_hw_params()
1077 snd_soc_component_write(component, M98088_REG_1B_DAI2_CLKCFG_LO, in max98088_dai2_hw_params()
1083 snd_soc_component_update_bits(component, M98088_REG_20_DAI2_FILTERS, in max98088_dai2_hw_params()
1086 snd_soc_component_update_bits(component, M98088_REG_20_DAI2_FILTERS, in max98088_dai2_hw_params()
1089 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, in max98088_dai2_hw_params()
1098 struct snd_soc_component *component = dai->component; in max98088_dai_set_sysclk() local
1099 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_dai_set_sysclk()
1115 snd_soc_component_write(component, M98088_REG_10_SYS_CLK, 0x10); in max98088_dai_set_sysclk()
1117 snd_soc_component_write(component, M98088_REG_10_SYS_CLK, 0x20); in max98088_dai_set_sysclk()
1119 dev_err(component->dev, "Invalid master clock frequency\n"); in max98088_dai_set_sysclk()
1123 if (snd_soc_component_read32(component, M98088_REG_51_PWR_SYS) & M98088_SHDNRUN) { in max98088_dai_set_sysclk()
1124 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, in max98088_dai_set_sysclk()
1126 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, in max98088_dai_set_sysclk()
1139 struct snd_soc_component *component = codec_dai->component; in max98088_dai1_set_fmt() local
1140 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_dai1_set_fmt()
1153 snd_soc_component_write(component, M98088_REG_12_DAI1_CLKCFG_HI, in max98088_dai1_set_fmt()
1155 snd_soc_component_write(component, M98088_REG_13_DAI1_CLKCFG_LO, in max98088_dai1_set_fmt()
1165 dev_err(component->dev, "Clock mode unsupported"); in max98088_dai1_set_fmt()
1195 snd_soc_component_update_bits(component, M98088_REG_14_DAI1_FORMAT, in max98088_dai1_set_fmt()
1202 snd_soc_component_write(component, M98088_REG_15_DAI1_CLOCK, reg15val); in max98088_dai1_set_fmt()
1211 struct snd_soc_component *component = codec_dai->component; in max98088_dai2_set_fmt() local
1212 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_dai2_set_fmt()
1224 snd_soc_component_write(component, M98088_REG_1A_DAI2_CLKCFG_HI, in max98088_dai2_set_fmt()
1226 snd_soc_component_write(component, M98088_REG_1B_DAI2_CLKCFG_LO, in max98088_dai2_set_fmt()
1236 dev_err(component->dev, "Clock mode unsupported"); in max98088_dai2_set_fmt()
1266 snd_soc_component_update_bits(component, M98088_REG_1C_DAI2_FORMAT, in max98088_dai2_set_fmt()
1270 snd_soc_component_write(component, M98088_REG_1D_DAI2_CLOCK, in max98088_dai2_set_fmt()
1279 struct snd_soc_component *component = codec_dai->component; in max98088_dai1_digital_mute() local
1287 snd_soc_component_update_bits(component, M98088_REG_2F_LVL_DAI1_PLAY, in max98088_dai1_digital_mute()
1294 struct snd_soc_component *component = codec_dai->component; in max98088_dai2_digital_mute() local
1302 snd_soc_component_update_bits(component, M98088_REG_31_LVL_DAI2_PLAY, in max98088_dai2_digital_mute()
1307 static int max98088_set_bias_level(struct snd_soc_component *component, in max98088_set_bias_level() argument
1310 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_set_bias_level()
1325 if (snd_soc_component_get_bias_level(component) == in max98088_set_bias_level()
1334 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) in max98088_set_bias_level()
1337 snd_soc_component_update_bits(component, M98088_REG_4C_PWR_EN_IN, in max98088_set_bias_level()
1342 snd_soc_component_update_bits(component, M98088_REG_4C_PWR_EN_IN, in max98088_set_bias_level()
1401 static int max98088_get_channel(struct snd_soc_component *component, const char *name) in max98088_get_channel() argument
1407 dev_err(component->dev, "Bad EQ channel name '%s'\n", name); in max98088_get_channel()
1411 static void max98088_setup_eq1(struct snd_soc_component *component) in max98088_setup_eq1() argument
1413 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_setup_eq1()
1438 dev_dbg(component->dev, "Selected %s/%dHz for %dHz sample rate\n", in max98088_setup_eq1()
1443 save = snd_soc_component_read32(component, M98088_REG_49_CFG_LEVEL); in max98088_setup_eq1()
1444 snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ1EN, 0); in max98088_setup_eq1()
1448 m98088_eq_band(component, 0, 0, coef_set->band1); in max98088_setup_eq1()
1449 m98088_eq_band(component, 0, 1, coef_set->band2); in max98088_setup_eq1()
1450 m98088_eq_band(component, 0, 2, coef_set->band3); in max98088_setup_eq1()
1451 m98088_eq_band(component, 0, 3, coef_set->band4); in max98088_setup_eq1()
1452 m98088_eq_band(component, 0, 4, coef_set->band5); in max98088_setup_eq1()
1455 snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ1EN, save); in max98088_setup_eq1()
1458 static void max98088_setup_eq2(struct snd_soc_component *component) in max98088_setup_eq2() argument
1460 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_setup_eq2()
1485 dev_dbg(component->dev, "Selected %s/%dHz for %dHz sample rate\n", in max98088_setup_eq2()
1490 save = snd_soc_component_read32(component, M98088_REG_49_CFG_LEVEL); in max98088_setup_eq2()
1491 snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ2EN, 0); in max98088_setup_eq2()
1495 m98088_eq_band(component, 1, 0, coef_set->band1); in max98088_setup_eq2()
1496 m98088_eq_band(component, 1, 1, coef_set->band2); in max98088_setup_eq2()
1497 m98088_eq_band(component, 1, 2, coef_set->band3); in max98088_setup_eq2()
1498 m98088_eq_band(component, 1, 3, coef_set->band4); in max98088_setup_eq2()
1499 m98088_eq_band(component, 1, 4, coef_set->band5); in max98088_setup_eq2()
1502 snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ2EN, in max98088_setup_eq2()
1509 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_put_eq_enum() local
1510 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_put_eq_enum()
1512 int channel = max98088_get_channel(component, kcontrol->id.name); in max98088_put_eq_enum()
1528 max98088_setup_eq1(component); in max98088_put_eq_enum()
1531 max98088_setup_eq2(component); in max98088_put_eq_enum()
1541 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_get_eq_enum() local
1542 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_get_eq_enum()
1543 int channel = max98088_get_channel(component, kcontrol->id.name); in max98088_get_eq_enum()
1554 static void max98088_handle_eq_pdata(struct snd_soc_component *component) in max98088_handle_eq_pdata() argument
1556 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_handle_eq_pdata()
1609 ret = snd_soc_add_component_controls(component, controls, ARRAY_SIZE(controls)); in max98088_handle_eq_pdata()
1611 dev_err(component->dev, "Failed to add EQ control: %d\n", ret); in max98088_handle_eq_pdata()
1614 static void max98088_handle_pdata(struct snd_soc_component *component) in max98088_handle_pdata() argument
1616 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_handle_pdata()
1621 dev_dbg(component->dev, "No platform data\n"); in max98088_handle_pdata()
1634 snd_soc_component_write(component, M98088_REG_48_CFG_MIC, regval); in max98088_handle_pdata()
1638 snd_soc_component_update_bits(component, M98088_REG_2A_MIC_REC_CNTL, in max98088_handle_pdata()
1643 max98088_handle_eq_pdata(component); in max98088_handle_pdata()
1646 static int max98088_probe(struct snd_soc_component *component) in max98088_probe() argument
1648 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_probe()
1676 ret = snd_soc_component_read32(component, M98088_REG_FF_REV_ID); in max98088_probe()
1678 dev_err(component->dev, "Failed to read device revision: %d\n", in max98088_probe()
1682 dev_info(component->dev, "revision %c\n", ret - 0x40 + 'A'); in max98088_probe()
1684 snd_soc_component_write(component, M98088_REG_51_PWR_SYS, M98088_PWRSV); in max98088_probe()
1686 snd_soc_component_write(component, M98088_REG_0F_IRQ_ENABLE, 0x00); in max98088_probe()
1688 snd_soc_component_write(component, M98088_REG_22_MIX_DAC, in max98088_probe()
1692 snd_soc_component_write(component, M98088_REG_4E_BIAS_CNTL, 0xF0); in max98088_probe()
1693 snd_soc_component_write(component, M98088_REG_50_DAC_BIAS2, 0x0F); in max98088_probe()
1695 snd_soc_component_write(component, M98088_REG_16_DAI1_IOCFG, in max98088_probe()
1698 snd_soc_component_write(component, M98088_REG_1E_DAI2_IOCFG, in max98088_probe()
1701 max98088_handle_pdata(component); in max98088_probe()
1707 static void max98088_remove(struct snd_soc_component *component) in max98088_remove() argument
1709 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_remove()