331 struct ichdev {  struct
373 	struct ichdev ichd[6];  argument
656 static void snd_intel8x0_setup_periods(struct intel8x0 *chip, struct ichdev *ichdev)   in snd_intel8x0_setup_periods()  argument
659 	__le32 *bdbar = ichdev->bdbar;  in snd_intel8x0_setup_periods()
660 	unsigned long port = ichdev->reg_offset;  in snd_intel8x0_setup_periods()
662 	iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr);  in snd_intel8x0_setup_periods()
663 	if (ichdev->size == ichdev->fragsize) {  in snd_intel8x0_setup_periods()
664 		ichdev->ack_reload = ichdev->ack = 2;  in snd_intel8x0_setup_periods()
665 		ichdev->fragsize1 = ichdev->fragsize >> 1;  in snd_intel8x0_setup_periods()
667 			bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf);  in snd_intel8x0_setup_periods()
669 						     ichdev->fragsize1 >> ichdev->pos_shift);  in snd_intel8x0_setup_periods()
670 			bdbar[idx + 2] = cpu_to_le32(ichdev->physbuf + (ichdev->size >> 1));  in snd_intel8x0_setup_periods()
672 						     ichdev->fragsize1 >> ichdev->pos_shift);  in snd_intel8x0_setup_periods()
674 		ichdev->frags = 2;  in snd_intel8x0_setup_periods()
676 		ichdev->ack_reload = ichdev->ack = 1;  in snd_intel8x0_setup_periods()
677 		ichdev->fragsize1 = ichdev->fragsize;  in snd_intel8x0_setup_periods()
679 			bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf +  in snd_intel8x0_setup_periods()
680 						     (((idx >> 1) * ichdev->fragsize) %  in snd_intel8x0_setup_periods()
681 						      ichdev->size));  in snd_intel8x0_setup_periods()
683 						     ichdev->fragsize >> ichdev->pos_shift);  in snd_intel8x0_setup_periods()
689 		ichdev->frags = ichdev->size / ichdev->fragsize;  in snd_intel8x0_setup_periods()
691 	iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi = ICH_REG_LVI_MASK);  in snd_intel8x0_setup_periods()
692 	ichdev->civ = 0;  in snd_intel8x0_setup_periods()
694 	ichdev->lvi_frag = ICH_REG_LVI_MASK % ichdev->frags;  in snd_intel8x0_setup_periods()
695 	ichdev->position = 0;  in snd_intel8x0_setup_periods()
699 	       ichdev->lvi_frag, ichdev->frags, ichdev->fragsize,  in snd_intel8x0_setup_periods()
700 	       ichdev->fragsize1);  in snd_intel8x0_setup_periods()
703 	iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);  in snd_intel8x0_setup_periods()
710 static inline void snd_intel8x0_update(struct intel8x0 *chip, struct ichdev *ichdev)  in snd_intel8x0_update()  argument
712 	unsigned long port = ichdev->reg_offset;  in snd_intel8x0_update()
718 	status = igetbyte(chip, port + ichdev->roff_sr);  in snd_intel8x0_update()
722 	} else if (civ == ichdev->civ) {  in snd_intel8x0_update()
725 		ichdev->civ++;  in snd_intel8x0_update()
726 		ichdev->civ &= ICH_REG_LVI_MASK;  in snd_intel8x0_update()
728 		step = civ - ichdev->civ;  in snd_intel8x0_update()
733 		ichdev->civ = civ;  in snd_intel8x0_update()
736 	ichdev->position += step * ichdev->fragsize1;  in snd_intel8x0_update()
738 		ichdev->position %= ichdev->size;  in snd_intel8x0_update()
739 	ichdev->lvi += step;  in snd_intel8x0_update()
740 	ichdev->lvi &= ICH_REG_LVI_MASK;  in snd_intel8x0_update()
741 	iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi);  in snd_intel8x0_update()
743 		ichdev->lvi_frag++;  in snd_intel8x0_update()
744 		ichdev->lvi_frag %= ichdev->frags;  in snd_intel8x0_update()
745 …ichdev->bdbar[ichdev->lvi * 2] = cpu_to_le32(ichdev->physbuf + ichdev->lvi_frag * ichdev->fragsize…  in snd_intel8x0_update()
749 	       ichdev->lvi * 2, ichdev->bdbar[ichdev->lvi * 2],  in snd_intel8x0_update()
750 	       ichdev->bdbar[ichdev->lvi * 2 + 1], inb(ICH_REG_OFF_PIV + port),  in snd_intel8x0_update()
753 		if (--ichdev->ack == 0) {  in snd_intel8x0_update()
754 			ichdev->ack = ichdev->ack_reload;  in snd_intel8x0_update()
759 	if (ack && ichdev->substream) {  in snd_intel8x0_update()
760 		snd_pcm_period_elapsed(ichdev->substream);  in snd_intel8x0_update()
762 	iputbyte(chip, port + ichdev->roff_sr,  in snd_intel8x0_update()
769 	struct ichdev *ichdev;  in snd_intel8x0_interrupt()  local
788 		ichdev = &chip->ichd[i];  in snd_intel8x0_interrupt()
789 		if (status & ichdev->int_sta_mask)  in snd_intel8x0_interrupt()
790 			snd_intel8x0_update(chip, ichdev);  in snd_intel8x0_interrupt()
806 	struct ichdev *ichdev = get_ichdev(substream);  in snd_intel8x0_pcm_trigger()  local
808 	unsigned long port = ichdev->reg_offset;  in snd_intel8x0_pcm_trigger()
812 		ichdev->suspended = 0;  in snd_intel8x0_pcm_trigger()
817 		ichdev->last_pos = ichdev->position;  in snd_intel8x0_pcm_trigger()
820 		ichdev->suspended = 1;  in snd_intel8x0_pcm_trigger()
834 		while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ;  in snd_intel8x0_pcm_trigger()
844 	struct ichdev *ichdev = get_ichdev(substream);  in snd_intel8x0_ali_trigger()  local
845 	unsigned long port = ichdev->reg_offset;  in snd_intel8x0_ali_trigger()
854 		ichdev->suspended = 0;  in snd_intel8x0_ali_trigger()
860 			fifo = igetdword(chip, fiforeg[ichdev->ali_slot / 4]);  in snd_intel8x0_ali_trigger()
861 			fifo &= ~(0xff << (ichdev->ali_slot % 4));    in snd_intel8x0_ali_trigger()
862 			fifo |= 0x83 << (ichdev->ali_slot % 4);   in snd_intel8x0_ali_trigger()
863 			iputdword(chip, fiforeg[ichdev->ali_slot / 4], fifo);  in snd_intel8x0_ali_trigger()
866 		val &= ~(1 << (ichdev->ali_slot + 16)); /* clear PAUSE flag */  in snd_intel8x0_ali_trigger()
868 		iputdword(chip, ICHREG(ALI_DMACR), val | (1 << ichdev->ali_slot));  in snd_intel8x0_ali_trigger()
871 		ichdev->suspended = 1;  in snd_intel8x0_ali_trigger()
876 		iputdword(chip, ICHREG(ALI_DMACR), val | (1 << (ichdev->ali_slot + 16)));  in snd_intel8x0_ali_trigger()
888 			  igetdword(chip, ICHREG(ALI_INTERRUPTSR)) & ichdev->int_sta_mask);  in snd_intel8x0_ali_trigger()
900 	struct ichdev *ichdev = get_ichdev(substream);  in snd_intel8x0_hw_params()  local
907 	if (ichdev->pcm_open_flag) {  in snd_intel8x0_hw_params()
908 		snd_ac97_pcm_close(ichdev->pcm);  in snd_intel8x0_hw_params()
909 		ichdev->pcm_open_flag = 0;  in snd_intel8x0_hw_params()
911 	err = snd_ac97_pcm_open(ichdev->pcm, params_rate(hw_params),  in snd_intel8x0_hw_params()
913 				ichdev->pcm->r[dbl].slots);  in snd_intel8x0_hw_params()
915 		ichdev->pcm_open_flag = 1;  in snd_intel8x0_hw_params()
917 		if (ichdev->ichd == ICHD_PCMOUT && chip->spdif_idx < 0)  in snd_intel8x0_hw_params()
918 			snd_ac97_set_rate(ichdev->pcm->r[0].codec[0], AC97_SPDIF,  in snd_intel8x0_hw_params()
926 	struct ichdev *ichdev = get_ichdev(substream);  in snd_intel8x0_hw_free()  local
928 	if (ichdev->pcm_open_flag) {  in snd_intel8x0_hw_free()
929 		snd_ac97_pcm_close(ichdev->pcm);  in snd_intel8x0_hw_free()
930 		ichdev->pcm_open_flag = 0;  in snd_intel8x0_hw_free()
994 	struct ichdev *ichdev = get_ichdev(substream);  in snd_intel8x0_pcm_prepare()  local
996 	ichdev->physbuf = runtime->dma_addr;  in snd_intel8x0_pcm_prepare()
997 	ichdev->size = snd_pcm_lib_buffer_bytes(substream);  in snd_intel8x0_pcm_prepare()
998 	ichdev->fragsize = snd_pcm_lib_period_bytes(substream);  in snd_intel8x0_pcm_prepare()
999 	if (ichdev->ichd == ICHD_PCMOUT) {  in snd_intel8x0_pcm_prepare()
1002 			ichdev->pos_shift = (runtime->sample_bits > 16) ? 2 : 1;  in snd_intel8x0_pcm_prepare()
1004 	snd_intel8x0_setup_periods(chip, ichdev);  in snd_intel8x0_pcm_prepare()
1011 	struct ichdev *ichdev = get_ichdev(substream);  in snd_intel8x0_pcm_pointer()  local
1018 		civ = igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV);  in snd_intel8x0_pcm_pointer()
1019 		ptr1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb);  in snd_intel8x0_pcm_pointer()
1020 		position = ichdev->position;  in snd_intel8x0_pcm_pointer()
1025 		if (civ != igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV))  in snd_intel8x0_pcm_pointer()
1036 		if (ptr1 == igetword(chip, ichdev->reg_offset + ichdev->roff_picb))  in snd_intel8x0_pcm_pointer()
1039 	ptr = ichdev->last_pos;  in snd_intel8x0_pcm_pointer()
1041 		ptr1 <<= ichdev->pos_shift;  in snd_intel8x0_pcm_pointer()
1042 		ptr = ichdev->fragsize1 - ptr1;  in snd_intel8x0_pcm_pointer()
1044 		if (ptr < ichdev->last_pos) {  in snd_intel8x0_pcm_pointer()
1046 			pos_base = position / ichdev->fragsize1;  in snd_intel8x0_pcm_pointer()
1047 			last_base = ichdev->last_pos / ichdev->fragsize1;  in snd_intel8x0_pcm_pointer()
1052 				ptr = ichdev->last_pos;  in snd_intel8x0_pcm_pointer()
1055 	ichdev->last_pos = ptr;  in snd_intel8x0_pcm_pointer()
1057 	if (ptr >= ichdev->size)  in snd_intel8x0_pcm_pointer()
1113 static int snd_intel8x0_pcm_open(struct snd_pcm_substream *substream, struct ichdev *ichdev)  in snd_intel8x0_pcm_open()  argument
1119 	ichdev->substream = substream;  in snd_intel8x0_pcm_open()
1121 	runtime->hw.rates = ichdev->pcm->rates;  in snd_intel8x0_pcm_open()
1129 	runtime->private_data = ichdev;  in snd_intel8x0_pcm_open()
2647 		struct ichdev *ichdev = &chip->ichd[i];  in intel8x0_resume()  local
2648 		unsigned long port = ichdev->reg_offset;  in intel8x0_resume()
2649 		if (! ichdev->substream || ! ichdev->suspended)  in intel8x0_resume()
2651 		if (ichdev->ichd == ICHD_PCMOUT)  in intel8x0_resume()
2652 			snd_intel8x0_setup_pcm_out(chip, ichdev->substream->runtime);  in intel8x0_resume()
2653 		iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr);  in intel8x0_resume()
2654 		iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi);  in intel8x0_resume()
2655 		iputbyte(chip, port + ICH_REG_OFF_CIV, ichdev->civ);  in intel8x0_resume()
2656 		iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);  in intel8x0_resume()
2674 	struct ichdev *ichdev;  in intel8x0_measure_ac97_clock()  local
2690 	ichdev = &chip->ichd[ICHD_PCMOUT];  in intel8x0_measure_ac97_clock()
2691 	ichdev->physbuf = subs->dma_buffer.addr;  in intel8x0_measure_ac97_clock()
2692 	ichdev->size = ichdev->fragsize = INTEL8X0_TESTBUF_SIZE;  in intel8x0_measure_ac97_clock()
2693 	ichdev->substream = NULL; /* don't process interrupts */  in intel8x0_measure_ac97_clock()
2701 	snd_intel8x0_setup_periods(chip, ichdev);  in intel8x0_measure_ac97_clock()
2702 	port = ichdev->reg_offset;  in intel8x0_measure_ac97_clock()
2710 		iputdword(chip, ICHREG(ALI_DMACR), 1 << ichdev->ali_slot);  in intel8x0_measure_ac97_clock()
2718 		civ = igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV);  in intel8x0_measure_ac97_clock()
2719 		pos1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb);  in intel8x0_measure_ac97_clock()
2724 		if (civ == igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV) &&  in intel8x0_measure_ac97_clock()
2725 		    pos1 == igetword(chip, ichdev->reg_offset + ichdev->roff_picb))  in intel8x0_measure_ac97_clock()
2731 		pos = ichdev->fragsize1;  in intel8x0_measure_ac97_clock()
2732 		pos -= pos1 << ichdev->pos_shift;  in intel8x0_measure_ac97_clock()
2733 		pos += ichdev->position;  in intel8x0_measure_ac97_clock()
2739 		iputdword(chip, ICHREG(ALI_DMACR), 1 << (ichdev->ali_slot + 16));  in intel8x0_measure_ac97_clock()
2745 		while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH))  in intel8x0_measure_ac97_clock()
2913 	struct ichdev *ichdev;  in snd_intel8x0_create()  local
3030 		ichdev = &chip->ichd[i];  in snd_intel8x0_create()
3031 		ichdev->ichd = i;  in snd_intel8x0_create()
3032 		ichdev->reg_offset = tbl[i].offset;  in snd_intel8x0_create()
3033 		ichdev->int_sta_mask = tbl[i].int_sta_mask;  in snd_intel8x0_create()
3036 			ichdev->roff_sr = ICH_REG_OFF_PICB;  in snd_intel8x0_create()
3037 			ichdev->roff_picb = ICH_REG_OFF_SR;  in snd_intel8x0_create()
3039 			ichdev->roff_sr = ICH_REG_OFF_SR;  in snd_intel8x0_create()
3040 			ichdev->roff_picb = ICH_REG_OFF_PICB;  in snd_intel8x0_create()
3043 			ichdev->ali_slot = (ichdev->reg_offset - 0x40) / 0x10;  in snd_intel8x0_create()
3045 		ichdev->pos_shift = (device_type == DEVICE_SIS) ? 0 : 1;  in snd_intel8x0_create()
3061 		ichdev = &chip->ichd[i];  in snd_intel8x0_create()
3062 		ichdev->bdbar = ((__le32 *)chip->bdbars.area) +  in snd_intel8x0_create()
3064 		ichdev->bdbar_addr = chip->bdbars.addr +  in snd_intel8x0_create()
3066 		int_sta_masks |= ichdev->int_sta_mask;  in snd_intel8x0_create()