Lines Matching refs:mem_base
1038 void __iomem *mem_base; member
3241 writew(gpio_data, spec->mem_base + 0x320); in ca0113_mmio_gpio_set()
3258 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3259 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3260 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3261 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3262 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3264 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3265 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set()
3267 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3272 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set()
3278 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set()
3279 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set()
3280 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set()
3282 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3283 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3284 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3285 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3297 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3298 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3299 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3300 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3301 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3303 writel(0x00800003, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3304 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set_type2()
3306 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3311 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set_type2()
3313 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set_type2()
3314 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set_type2()
3315 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set_type2()
3317 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3318 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3319 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3320 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
7089 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7090 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7091 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7092 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7093 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7094 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7095 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7096 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7097 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7098 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7099 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7100 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7790 writeb(0x0, spec->mem_base + 0x100); in sbz_region2_exit()
7792 writeb(0xb3, spec->mem_base + 0x304); in sbz_region2_exit()
8048 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
8049 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
8106 writel(0x00000001, spec->mem_base + 0x400); in ca0132_mmio_init()
8108 writel(0x00000000, spec->mem_base + 0x400); in ca0132_mmio_init()
8111 writel(0x00000001, spec->mem_base + 0x408); in ca0132_mmio_init()
8113 writel(0x00000000, spec->mem_base + 0x408); in ca0132_mmio_init()
8116 writel(0x00000001, spec->mem_base + 0x40c); in ca0132_mmio_init()
8118 writel(0x00000000, spec->mem_base + 0x40C); in ca0132_mmio_init()
8121 writel(0x00880640, spec->mem_base + 0x01C); in ca0132_mmio_init()
8123 writel(0x00880680, spec->mem_base + 0x01C); in ca0132_mmio_init()
8126 writel(0x00000080, spec->mem_base + 0xC0C); in ca0132_mmio_init()
8128 writel(0x00000083, spec->mem_base + 0xC0C); in ca0132_mmio_init()
8130 writel(0x00000030, spec->mem_base + 0xC00); in ca0132_mmio_init()
8131 writel(0x00000000, spec->mem_base + 0xC04); in ca0132_mmio_init()
8134 writel(0x00000000, spec->mem_base + 0xC0C); in ca0132_mmio_init()
8136 writel(0x00000003, spec->mem_base + 0xC0C); in ca0132_mmio_init()
8138 writel(0x00000003, spec->mem_base + 0xC0C); in ca0132_mmio_init()
8139 writel(0x00000003, spec->mem_base + 0xC0C); in ca0132_mmio_init()
8140 writel(0x00000003, spec->mem_base + 0xC0C); in ca0132_mmio_init()
8143 writel(0x00000001, spec->mem_base + 0xC08); in ca0132_mmio_init()
8145 writel(0x000000C1, spec->mem_base + 0xC08); in ca0132_mmio_init()
8147 writel(0x000000F1, spec->mem_base + 0xC08); in ca0132_mmio_init()
8148 writel(0x00000001, spec->mem_base + 0xC08); in ca0132_mmio_init()
8149 writel(0x000000C7, spec->mem_base + 0xC08); in ca0132_mmio_init()
8150 writel(0x000000C1, spec->mem_base + 0xC08); in ca0132_mmio_init()
8151 writel(0x00000080, spec->mem_base + 0xC04); in ca0132_mmio_init()
8154 writel(0x00000000, spec->mem_base + 0x42c); in ca0132_mmio_init()
8155 writel(0x00000000, spec->mem_base + 0x46c); in ca0132_mmio_init()
8156 writel(0x00000000, spec->mem_base + 0x4ac); in ca0132_mmio_init()
8157 writel(0x00000000, spec->mem_base + 0x4ec); in ca0132_mmio_init()
8158 writel(0x00000000, spec->mem_base + 0x43c); in ca0132_mmio_init()
8159 writel(0x00000000, spec->mem_base + 0x47c); in ca0132_mmio_init()
8160 writel(0x00000000, spec->mem_base + 0x4bc); in ca0132_mmio_init()
8161 writel(0x00000000, spec->mem_base + 0x4fc); in ca0132_mmio_init()
8162 writel(0x00000600, spec->mem_base + 0x100); in ca0132_mmio_init()
8163 writel(0x00000014, spec->mem_base + 0x410); in ca0132_mmio_init()
8164 writel(0x0000060f, spec->mem_base + 0x100); in ca0132_mmio_init()
8165 writel(0x0000070f, spec->mem_base + 0x100); in ca0132_mmio_init()
8166 writel(0x00000aff, spec->mem_base + 0x830); in ca0132_mmio_init()
8167 writel(0x00000000, spec->mem_base + 0x86c); in ca0132_mmio_init()
8168 writel(0x0000006b, spec->mem_base + 0x800); in ca0132_mmio_init()
8169 writel(0x00000001, spec->mem_base + 0x86c); in ca0132_mmio_init()
8170 writel(0x0000006b, spec->mem_base + 0x800); in ca0132_mmio_init()
8171 writel(0x00000057, spec->mem_base + 0x804); in ca0132_mmio_init()
8172 writel(0x00800000, spec->mem_base + 0x20c); in ca0132_mmio_init()
8191 writeb(0x0f, spec->mem_base + 0x304); in ae5_register_set()
8192 writeb(0x0f, spec->mem_base + 0x304); in ae5_register_set()
8193 writeb(0x0f, spec->mem_base + 0x304); in ae5_register_set()
8194 writeb(0x0f, spec->mem_base + 0x304); in ae5_register_set()
8195 writeb(0x0e, spec->mem_base + 0x100); in ae5_register_set()
8196 writeb(0x1f, spec->mem_base + 0x304); in ae5_register_set()
8197 writeb(0x0c, spec->mem_base + 0x100); in ae5_register_set()
8198 writeb(0x3f, spec->mem_base + 0x304); in ae5_register_set()
8199 writeb(0x08, spec->mem_base + 0x100); in ae5_register_set()
8200 writeb(0x7f, spec->mem_base + 0x304); in ae5_register_set()
8201 writeb(0x00, spec->mem_base + 0x100); in ae5_register_set()
8202 writeb(0xff, spec->mem_base + 0x304); in ae5_register_set()
8435 if (spec->mem_base) in ca0132_free()
8436 pci_iounmap(codec->bus->pci, spec->mem_base); in ca0132_free()
8822 spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20); in patch_ca0132()
8823 if (spec->mem_base == NULL) { in patch_ca0132()