99 #define CM_REG_CHFORMAT		0x08  macro
749 			snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C);  in set_dac_channels()
752 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C);  in set_dac_channels()
756 			snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);  in set_dac_channels()
758 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);  in set_dac_channels()
843 	val = snd_cmipci_read(cm, CM_REG_CHFORMAT);  in snd_cmipci_pcm_prepare()
855 	snd_cmipci_write(cm, CM_REG_CHFORMAT, val);  in snd_cmipci_pcm_prepare()
1194 		snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_AC3EN1);  in setup_ac3()
1201 			snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL);  in setup_ac3()
1209 					snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_PLAYBACK_SRATE_176K);  in setup_ac3()
1211 					snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_PLAYBACK_SRATE_176K);  in setup_ac3()
1217 		snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_AC3EN1);  in setup_ac3()
1224 				snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL);  in setup_ac3()
1227 				snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL);  in setup_ac3()
1231 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL);  in setup_ac3()
1232 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_PLAYBACK_SRATE_176K);  in setup_ac3()
1262 			snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);  in setup_spdif_playback()
1264 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);  in setup_spdif_playback()
1269 		snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);  in setup_spdif_playback()
1342 		val = snd_cmipci_read(cm, CM_REG_CHFORMAT);  in snd_cmipci_silence_hack()
1347 		snd_cmipci_write(cm, CM_REG_CHFORMAT, val);  in snd_cmipci_silence_hack()
1400 			snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);  in snd_cmipci_capture_spdif_prepare()
1402 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);  in snd_cmipci_capture_spdif_prepare()
2427 DEFINE_BIT_SWITCH_ARG(spdif_in_sel1, CM_REG_CHFORMAT, CM_SPDIF_SELECT1, 0, 0);
2440 DEFINE_BIT_SWITCH_ARG(spdi_phase2, CM_REG_CHFORMAT, CM_SPDIF_INVERSE2, 0, 0);
2807 		detect = snd_cmipci_read(cm, CM_REG_CHFORMAT) & CM_CHIP_MASK1;  in query_chip()
3087 	snd_cmipci_write(cm, CM_REG_CHFORMAT, 0);  in snd_cmipci_create()
3312 	CM_REG_FUNCTRL1, CM_REG_CHFORMAT, CM_REG_LEGACY_CTRL, CM_REG_MISC_CTRL,