Lines Matching refs:__be16
59 __be16 ceter; /* QE timer event register */
61 __be16 cetmr; /* QE timers mask register */
68 __be16 cercr; /* QE RAM control register */
71 __be16 ceexe1; /* QE external request 1 event register */
73 __be16 ceexm1; /* QE external request 1 mask register */
75 __be16 ceexe2; /* QE external request 2 event register */
77 __be16 ceexm2; /* QE external request 2 mask register */
79 __be16 ceexe3; /* QE external request 3 event register */
81 __be16 ceexm3; /* QE external request 3 mask register */
83 __be16 ceexe4; /* QE external request 4 event register */
85 __be16 ceexm4; /* QE external request 4 mask register */
108 __be16 gtmdr1; /* Timer 1 mode register */
109 __be16 gtmdr2; /* Timer 2 mode register */
110 __be16 gtrfr1; /* Timer 1 reference register */
111 __be16 gtrfr2; /* Timer 2 reference register */
112 __be16 gtcpr1; /* Timer 1 capture register */
113 __be16 gtcpr2; /* Timer 2 capture register */
114 __be16 gtcnr1; /* Timer 1 counter */
115 __be16 gtcnr2; /* Timer 2 counter */
116 __be16 gtmdr3; /* Timer 3 mode register */
117 __be16 gtmdr4; /* Timer 4 mode register */
118 __be16 gtrfr3; /* Timer 3 reference register */
119 __be16 gtrfr4; /* Timer 4 reference register */
120 __be16 gtcpr3; /* Timer 3 capture register */
121 __be16 gtcpr4; /* Timer 4 capture register */
122 __be16 gtcnr3; /* Timer 3 counter */
123 __be16 gtcnr4; /* Timer 4 counter */
124 __be16 gtevr1; /* Timer 1 event register */
125 __be16 gtevr2; /* Timer 2 event register */
126 __be16 gtevr3; /* Timer 3 event register */
127 __be16 gtevr4; /* Timer 4 event register */
128 __be16 gtps; /* Timer 1 prescale register */
158 __be16 sixmr1[4]; /* SI1 TDMx (x = A B C D) mode register */
165 __be16 sirsr1_h; /* SI1 RAM shadow address register high */
175 __be16 siemr1; /* SI1 TDME mode register 16 bits */
176 __be16 sifmr1; /* SI1 TDMF mode register 16 bits */
177 __be16 sigmr1; /* SI1 TDMG mode register 16 bits */
178 __be16 sihmr1; /* SI1 TDMH mode register 16 bits */
185 __be16 sirsr1_l; /* SI1 RAM shadow address register low 16 bits*/
213 __be16 usb_usep[4];
215 __be16 usb_usber;
217 __be16 usb_usbmr;
220 __be16 usb_ussft;
222 __be16 usb_usfrn;
239 __be16 upsmr; /* UCCx protocol-specific mode register */
241 __be16 utodr; /* UCCx transmit on demand register */
242 __be16 udsr; /* UCCx data synchronization register */
243 __be16 ucce; /* UCCx event register */
245 __be16 uccm; /* UCCx mask register */
249 __be16 utpt;
258 __be16 utodr; /* UCCx transmit on demand register */
260 __be16 udsr; /* UCCx data synchronization register */
267 __be16 urfs; /* UCC receive FIFO size */
269 __be16 urfet; /* UCC receive FIFO emergency threshold */
270 __be16 urfset; /* UCC receive FIFO special emergency
273 __be16 utfs; /* UCC transmit FIFO size */
275 __be16 utfet; /* UCC transmit FIFO emergency threshold */
277 __be16 utftt; /* UCC transmit FIFO transmit threshold */
279 __be16 utpt; /* UCC transmit polling timer */
322 __be16 uprp1;
323 __be16 uprp2;
324 __be16 uprp3;
325 __be16 uprp4;
327 __be16 uptirr1_0; /* Device 1 transmit internal rate 0 */
328 __be16 uptirr1_1; /* Device 1 transmit internal rate 1 */
329 __be16 uptirr1_2; /* Device 1 transmit internal rate 2 */
330 __be16 uptirr1_3; /* Device 1 transmit internal rate 3 */
331 __be16 uptirr2_0; /* Device 2 transmit internal rate 0 */
332 __be16 uptirr2_1; /* Device 2 transmit internal rate 1 */
333 __be16 uptirr2_2; /* Device 2 transmit internal rate 2 */
334 __be16 uptirr2_3; /* Device 2 transmit internal rate 3 */
335 __be16 uptirr3_0; /* Device 3 transmit internal rate 0 */
336 __be16 uptirr3_1; /* Device 3 transmit internal rate 1 */
337 __be16 uptirr3_2; /* Device 3 transmit internal rate 2 */
338 __be16 uptirr3_3; /* Device 3 transmit internal rate 3 */
339 __be16 uptirr4_0; /* Device 4 transmit internal rate 0 */
340 __be16 uptirr4_1; /* Device 4 transmit internal rate 1 */
341 __be16 uptirr4_2; /* Device 4 transmit internal rate 2 */
342 __be16 uptirr4_3; /* Device 4 transmit internal rate 3 */