Lines Matching full:transfer
49 * transfer bytes histogramm
99 * The spi_transfer.speed_hz can override this for each transfer.
105 * each word in a transfer (by specifying SPI_LSB_FIRST).
111 * The spi_transfer.bits_per_word can override this for each transfer.
127 * words of a transfer
315 * supported. If set, the SPI core will reject any transfer with an
318 * @min_speed_hz: Lowest supported transfer speed
319 * @max_speed_hz: Highest supported transfer speed
322 * @max_transfer_size: function that returns the max transfer size for
338 * @transfer: adds a message to the controller's transfer queue.
359 * @max_dma_len: Maximum length of a DMA transfer for the device.
361 * so the subsystem requests the driver to prepare the transfer hardware
363 * @transfer_one_message: the subsystem calls the driver to transfer a single
374 * @prepare_message: set up the controller to transfer a single message,
377 * @transfer_one: transfer a single spi_transfer.
378 * - return 0 if the transfer is finished,
379 * - return 1 if the transfer is still in progress. When
380 * the driver is finished with this transfer it must
382 * can issue the next transfer. Note: transfer_one and
392 * @slave_abort: abort the ongoing transfer request on an SPI slave controller
455 /* limits on transfer speed */
473 * on some hardware transfer / message size may be constrained
474 * the limit may depend on device transfer settings
510 * + The transfer() method may not sleep; its main role is
527 int (*transfer)(struct spi_device *spi, member
535 * exists and returns true then the transfer will be mapped
546 * controller transfer queueing mechanism. If these are used, the
547 * transfer() function above must NOT be specified by the driver.
583 struct spi_transfer *transfer);
713 * The spi_messages themselves consist of a series of read+write transfer
736 * transfer. If 0 the default (from @spi_device) is used.
738 * for this transfer. If 0 the default (from @spi_device) is used.
739 * @cs_change: affects chipselect after this transfer completes
743 * @delay_usecs: microseconds to delay after this transfer before
745 * the next transfer or completing this @spi_message.
751 * transfer this transfer. Set to 0 if the spi bus driver does
775 * When the word size of the SPI transfer is not a power-of-two multiple
781 * it stays selected until after the last transfer in a message. Drivers
784 * (i) If the transfer isn't the last one in the message, this flag is
790 * (ii) When the transfer is the last one in the message, the chip may
791 * stay selected until the next transfer. On multi-device SPI busses
800 * When SPI can transfer in 1x,2x or 4x. It can get this transfer information
802 * two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x)
803 * SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer.
829 #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */
830 #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
831 #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
850 * @transfers: list of transfer segments in this transaction
853 * addresses for each transfer buffer
868 * as single programmed DMA transfer. On all systems, these messages are
886 * last transfer ... allowing things like "read 16 bit length L"
1013 /* transfer size limit must not be greater than messsage size limit */ in spi_max_transfer_size()
1039 /* SPI transfer replacement methods which make use of spi_res */
1054 * @replaced_after: the transfer after which the @replaced_transfers
1084 /* SPI transfer transformation methods */
1093 /* All these synchronous SPI transfer routines are utilities layered
1094 * over the core async transfer primitive. Here, "synchronous" means
1095 * they will sleep uninterruptibly until the async transfer completes.
1104 * spi_sync_transfer - synchronous SPI data transfer
1110 * Does a synchronous SPI data transfer of the given spi_transfer array.
1290 * as the default transfer wordsize) is not included here.