Lines Matching full:transmit
60 #define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */
69 #define SSCR1_TIE (1 << 1) /* Transmit FIFO Interrupt Enable */
73 #define SSCR1_MWDS (1 << 5) /* Microwire Transmit Data Size */
76 #define SSSR_TNF (1 << 2) /* Transmit FIFO Not Full */
79 #define SSSR_TFS (1 << 5) /* Transmit FIFO Service Request */
86 #define SSSR_TFL_MASK (0xf << 8) /* Transmit FIFO Level mask */
89 #define SSCR1_TFT (0x000003c0) /* Transmit FIFO Threshold (mask) */
97 #define CE4100_SSSR_TFL_MASK (0x3 << 8) /* Transmit FIFO Level mask */
100 #define CE4100_SSCR1_TFT (0x000000c0) /* Transmit FIFO Threshold (mask) */
114 #define QUARK_X1000_SSSR_TFL_MASK (0x1F << 8) /* Transmit FIFO Level mask */
117 #define QUARK_X1000_SSCR1_TFT (0x1F << 6) /* Transmit FIFO Threshold (mask) */
135 #define SSCR1_RWOT (1 << 23) /* Receive Without Transmit */
137 #define SSCR1_TSRE (1 << 21) /* Transmit Service Request Enable */
147 #define SSSR_TUR (1 << 21) /* Transmit FIFO Under Run */