49 	u32 cycle;  member
57 	u32 cycle;  member
156 		dma_addr_t buf_base, u32 aspace, u32 cycle)  in fake_slave_set()  argument
213 	bridge->slaves[i].cycle = cycle;  in fake_slave_set()
225 		dma_addr_t *buf_base, u32 *aspace, u32 *cycle)  in fake_slave_get()  argument
241 	*cycle = bridge->slaves[i].cycle;  in fake_slave_get()
253 		u32 aspace, u32 cycle, u32 dwidth)  in fake_master_set()  argument
321 	bridge->masters[i].cycle = cycle;  in fake_master_set()
340 		u32 *aspace, u32 *cycle, u32 *dwidth)  in __fake_master_get()  argument
353 	*cycle = bridge->masters[i].cycle;  in __fake_master_get()
362 		u32 *aspace, u32 *cycle, u32 *dwidth)  in fake_master_get()  argument
369 			cycle, dwidth);  in fake_master_get()
378 			  u32 aspace, u32 cycle)  in fake_lm_check()  argument
403 		if ((lm_aspace == aspace) && (lm_cycle == cycle)) {  in fake_lm_check()
418 		u32 aspace, u32 cycle)  in fake_vmeread8()  argument
432 		if (cycle != bridge->slaves[i].cycle)  in fake_vmeread8()
444 	fake_lm_check(bridge, addr, aspace, cycle);  in fake_vmeread8()
450 		u32 aspace, u32 cycle)  in fake_vmeread16()  argument
461 		if (cycle != bridge->slaves[i].cycle)  in fake_vmeread16()
476 	fake_lm_check(bridge, addr, aspace, cycle);  in fake_vmeread16()
482 		u32 aspace, u32 cycle)  in fake_vmeread32()  argument
493 		if (cycle != bridge->slaves[i].cycle)  in fake_vmeread32()
508 	fake_lm_check(bridge, addr, aspace, cycle);  in fake_vmeread32()
517 	u32 aspace, cycle, dwidth;  in fake_master_read()  local
533 	cycle = priv->masters[i].cycle;  in fake_master_read()
547 		*(u8 *)buf = fake_vmeread8(priv, addr, aspace, cycle);  in fake_master_read()
556 						addr + done, aspace, cycle);  in fake_master_read()
561 						addr + done, aspace, cycle);  in fake_master_read()
571 					aspace, cycle);  in fake_master_read()
578 					aspace, cycle);  in fake_master_read()
585 					aspace, cycle);  in fake_master_read()
594 					aspace, cycle);  in fake_master_read()
600 				cycle);  in fake_master_read()
613 			   unsigned long long addr, u32 aspace, u32 cycle)  in fake_vmewrite8()  argument
623 		if (cycle != bridge->slaves[i].cycle)  in fake_vmewrite8()
638 	fake_lm_check(bridge, addr, aspace, cycle);  in fake_vmewrite8()
643 			    unsigned long long addr, u32 aspace, u32 cycle)  in fake_vmewrite16()  argument
653 		if (cycle != bridge->slaves[i].cycle)  in fake_vmewrite16()
668 	fake_lm_check(bridge, addr, aspace, cycle);  in fake_vmewrite16()
673 			    unsigned long long addr, u32 aspace, u32 cycle)  in fake_vmewrite32()  argument
683 		if (cycle != bridge->slaves[i].cycle)  in fake_vmewrite32()
698 	fake_lm_check(bridge, addr, aspace, cycle);  in fake_vmewrite32()
706 	u32 aspace, cycle, dwidth;  in fake_master_write()  local
723 	cycle = bridge->masters[i].cycle;  in fake_master_write()
732 		fake_vmewrite8(bridge, (u8 *)buf, addr, aspace, cycle);  in fake_master_write()
742 						addr + done, aspace, cycle);  in fake_master_write()
747 						addr + done, aspace, cycle);  in fake_master_write()
757 					addr + done, aspace, cycle);  in fake_master_write()
764 					addr + done, aspace, cycle);  in fake_master_write()
771 					aspace, cycle);  in fake_master_write()
780 					addr + done, aspace, cycle);  in fake_master_write()
787 				cycle);  in fake_master_write()
809 	u32 aspace, cycle;  in fake_master_rmw()  local
820 	cycle = bridge->masters[i].cycle;  in fake_master_rmw()
826 	tmp = fake_vmeread32(bridge, base + offset, aspace, cycle);  in fake_master_rmw()
834 		fake_vmewrite32(bridge, &tmp, base + offset, aspace, cycle);  in fake_master_rmw()
851 		u32 aspace, u32 cycle)  in fake_lm_set()  argument
886 	bridge->lm_cycle = cycle;  in fake_lm_set()
897 		unsigned long long *lm_base, u32 *aspace, u32 *cycle)  in fake_lm_get()  argument
907 	*cycle = bridge->lm_cycle;  in fake_lm_get()