118 	const struct dispc_features *feat;  member
547 	if (channel == OMAP_DSS_CHANNEL_DIGIT && dispc.feat->no_framedone_tv)  in dispc_mgr_get_framedone_irq()
721 	if (dispc.feat->has_writeback)  in dispc_setup_color_conv_coef()
1056 	if (dispc.feat->has_writeback)  in dispc_configure_burst_sizes()
1138 	val = FLD_VAL(height - 1, dispc.feat->mgr_height_start, 16) |  in dispc_mgr_set_size()
1139 		FLD_VAL(width - 1, dispc.feat->mgr_width_start, 0);  in dispc_mgr_set_size()
1156 	for (fifo = 0; fifo < dispc.feat->num_fifos; ++fifo) {  in dispc_init_fifos()
1175 	if (dispc.feat->gfx_fifo_workaround) {  in dispc_init_fifos()
1205 	if (dispc.feat->has_writeback) {  in dispc_init_fifos()
1222 	for (fifo = 0; fifo < dispc.feat->num_fifos; ++fifo) {  in dispc_ovl_get_fifo_size()
1263 	if (dss_has_feature(FEAT_PRELOAD) && dispc.feat->set_max_preload &&  in dispc_ovl_set_fifo_threshold()
1382 	if (dispc.feat->has_writeback) {  in dispc_init_mflag()
2302 		*core_clk = dispc.feat->calc_core_clk(pclk, in_width,  in dispc_ovl_calc_scaling_24xx()
2357 			*core_clk = dispc.feat->calc_core_clk(pclk, in_width,  in dispc_ovl_calc_scaling_34xx()
2452 	*core_clk = dispc.feat->calc_core_clk(pclk, in_width, in_height,  in dispc_ovl_calc_scaling_44xx()
2512 	ret = dispc.feat->calc_scaling(pclk, lclk, mgr_timings, width, height,  in dispc_ovl_calc_scaling()
2749 	if (dispc.feat->last_pixel_inc_missing)  in dispc_ovl_setup_common()
3082 	return width <= dispc.feat->mgr_width_max &&  in _dispc_mgr_size_ok()
3083 		height <= dispc.feat->mgr_height_max;  in _dispc_mgr_size_ok()
3089 	if (hsw < 1 || hsw > dispc.feat->sw_max ||  in _dispc_lcd_timings_ok()
3090 			hfp < 1 || hfp > dispc.feat->hp_max ||  in _dispc_lcd_timings_ok()
3091 			hbp < 1 || hbp > dispc.feat->hp_max ||  in _dispc_lcd_timings_ok()
3092 			vsw < 1 || vsw > dispc.feat->sw_max ||  in _dispc_lcd_timings_ok()
3093 			vfp < 0 || vfp > dispc.feat->vp_max ||  in _dispc_lcd_timings_ok()
3094 			vbp < 0 || vbp > dispc.feat->vp_max)  in _dispc_lcd_timings_ok()
3103 		return pclk <= dispc.feat->max_lcd_pclk ? true : false;  in _dispc_mgr_pclk_ok()
3105 		return pclk <= dispc.feat->max_tv_pclk ? true : false;  in _dispc_mgr_pclk_ok()
3143 	timing_h = FLD_VAL(hsw-1, dispc.feat->sw_start, 0) |  in _dispc_mgr_set_lcd_timings()
3144 			FLD_VAL(hfp-1, dispc.feat->fp_start, 8) |  in _dispc_mgr_set_lcd_timings()
3145 			FLD_VAL(hbp-1, dispc.feat->bp_start, 20);  in _dispc_mgr_set_lcd_timings()
3146 	timing_v = FLD_VAL(vsw-1, dispc.feat->sw_start, 0) |  in _dispc_mgr_set_lcd_timings()
3147 			FLD_VAL(vfp, dispc.feat->fp_start, 8) |  in _dispc_mgr_set_lcd_timings()
3148 			FLD_VAL(vbp, dispc.feat->bp_start, 20);  in _dispc_mgr_set_lcd_timings()
3219 	if (dispc.feat->supports_sync_align)  in _dispc_mgr_set_lcd_timings()
3614 	if (dispc.feat->has_writeback) {  in dispc_dump_regs()
3856 	if (dispc.feat->mstandby_workaround)  in _omap_dispc_initial_config()
4053 	dispc.feat = dispc_get_features();  in dispc_bind()
4054 	if (!dispc.feat)  in dispc_bind()