Lines Matching refs:hsotg
67 int dwc2_backup_global_registers(struct dwc2_hsotg *hsotg) in dwc2_backup_global_registers() argument
71 dev_dbg(hsotg->dev, "%s\n", __func__); in dwc2_backup_global_registers()
74 gr = &hsotg->gr_backup; in dwc2_backup_global_registers()
76 gr->gotgctl = dwc2_readl(hsotg, GOTGCTL); in dwc2_backup_global_registers()
77 gr->gintmsk = dwc2_readl(hsotg, GINTMSK); in dwc2_backup_global_registers()
78 gr->gahbcfg = dwc2_readl(hsotg, GAHBCFG); in dwc2_backup_global_registers()
79 gr->gusbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_backup_global_registers()
80 gr->grxfsiz = dwc2_readl(hsotg, GRXFSIZ); in dwc2_backup_global_registers()
81 gr->gnptxfsiz = dwc2_readl(hsotg, GNPTXFSIZ); in dwc2_backup_global_registers()
82 gr->gdfifocfg = dwc2_readl(hsotg, GDFIFOCFG); in dwc2_backup_global_registers()
83 gr->pcgcctl1 = dwc2_readl(hsotg, PCGCCTL1); in dwc2_backup_global_registers()
84 gr->glpmcfg = dwc2_readl(hsotg, GLPMCFG); in dwc2_backup_global_registers()
85 gr->gi2cctl = dwc2_readl(hsotg, GI2CCTL); in dwc2_backup_global_registers()
86 gr->pcgcctl = dwc2_readl(hsotg, PCGCTL); in dwc2_backup_global_registers()
99 int dwc2_restore_global_registers(struct dwc2_hsotg *hsotg) in dwc2_restore_global_registers() argument
103 dev_dbg(hsotg->dev, "%s\n", __func__); in dwc2_restore_global_registers()
106 gr = &hsotg->gr_backup; in dwc2_restore_global_registers()
108 dev_err(hsotg->dev, "%s: no global registers to restore\n", in dwc2_restore_global_registers()
114 dwc2_writel(hsotg, 0xffffffff, GINTSTS); in dwc2_restore_global_registers()
115 dwc2_writel(hsotg, gr->gotgctl, GOTGCTL); in dwc2_restore_global_registers()
116 dwc2_writel(hsotg, gr->gintmsk, GINTMSK); in dwc2_restore_global_registers()
117 dwc2_writel(hsotg, gr->gusbcfg, GUSBCFG); in dwc2_restore_global_registers()
118 dwc2_writel(hsotg, gr->gahbcfg, GAHBCFG); in dwc2_restore_global_registers()
119 dwc2_writel(hsotg, gr->grxfsiz, GRXFSIZ); in dwc2_restore_global_registers()
120 dwc2_writel(hsotg, gr->gnptxfsiz, GNPTXFSIZ); in dwc2_restore_global_registers()
121 dwc2_writel(hsotg, gr->gdfifocfg, GDFIFOCFG); in dwc2_restore_global_registers()
122 dwc2_writel(hsotg, gr->pcgcctl1, PCGCCTL1); in dwc2_restore_global_registers()
123 dwc2_writel(hsotg, gr->glpmcfg, GLPMCFG); in dwc2_restore_global_registers()
124 dwc2_writel(hsotg, gr->pcgcctl, PCGCTL); in dwc2_restore_global_registers()
125 dwc2_writel(hsotg, gr->gi2cctl, GI2CCTL); in dwc2_restore_global_registers()
136 int dwc2_exit_partial_power_down(struct dwc2_hsotg *hsotg, bool restore) in dwc2_exit_partial_power_down() argument
141 if (hsotg->params.power_down != DWC2_POWER_DOWN_PARAM_PARTIAL) in dwc2_exit_partial_power_down()
144 pcgcctl = dwc2_readl(hsotg, PCGCTL); in dwc2_exit_partial_power_down()
146 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_exit_partial_power_down()
148 pcgcctl = dwc2_readl(hsotg, PCGCTL); in dwc2_exit_partial_power_down()
150 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_exit_partial_power_down()
152 pcgcctl = dwc2_readl(hsotg, PCGCTL); in dwc2_exit_partial_power_down()
154 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_exit_partial_power_down()
158 ret = dwc2_restore_global_registers(hsotg); in dwc2_exit_partial_power_down()
160 dev_err(hsotg->dev, "%s: failed to restore registers\n", in dwc2_exit_partial_power_down()
164 if (dwc2_is_host_mode(hsotg)) { in dwc2_exit_partial_power_down()
165 ret = dwc2_restore_host_registers(hsotg); in dwc2_exit_partial_power_down()
167 dev_err(hsotg->dev, "%s: failed to restore host registers\n", in dwc2_exit_partial_power_down()
172 ret = dwc2_restore_device_registers(hsotg, 0); in dwc2_exit_partial_power_down()
174 dev_err(hsotg->dev, "%s: failed to restore device registers\n", in dwc2_exit_partial_power_down()
189 int dwc2_enter_partial_power_down(struct dwc2_hsotg *hsotg) in dwc2_enter_partial_power_down() argument
194 if (!hsotg->params.power_down) in dwc2_enter_partial_power_down()
198 ret = dwc2_backup_global_registers(hsotg); in dwc2_enter_partial_power_down()
200 dev_err(hsotg->dev, "%s: failed to backup global registers\n", in dwc2_enter_partial_power_down()
205 if (dwc2_is_host_mode(hsotg)) { in dwc2_enter_partial_power_down()
206 ret = dwc2_backup_host_registers(hsotg); in dwc2_enter_partial_power_down()
208 dev_err(hsotg->dev, "%s: failed to backup host registers\n", in dwc2_enter_partial_power_down()
213 ret = dwc2_backup_device_registers(hsotg); in dwc2_enter_partial_power_down()
215 dev_err(hsotg->dev, "%s: failed to backup device registers\n", in dwc2_enter_partial_power_down()
225 dwc2_writel(hsotg, 0xffffffff, GINTSTS); in dwc2_enter_partial_power_down()
228 pcgcctl = dwc2_readl(hsotg, PCGCTL); in dwc2_enter_partial_power_down()
231 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_enter_partial_power_down()
235 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_enter_partial_power_down()
239 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_enter_partial_power_down()
251 static void dwc2_restore_essential_regs(struct dwc2_hsotg *hsotg, int rmode, in dwc2_restore_essential_regs() argument
259 gr = &hsotg->gr_backup; in dwc2_restore_essential_regs()
260 dr = &hsotg->dr_backup; in dwc2_restore_essential_regs()
261 hr = &hsotg->hr_backup; in dwc2_restore_essential_regs()
263 dev_dbg(hsotg->dev, "%s: restoring essential regs\n", __func__); in dwc2_restore_essential_regs()
275 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_restore_essential_regs()
278 dwc2_writel(hsotg, gr->gahbcfg | GAHBCFG_GLBL_INTR_EN, GAHBCFG); in dwc2_restore_essential_regs()
281 dwc2_writel(hsotg, 0xffffffff, GINTSTS); in dwc2_restore_essential_regs()
284 dwc2_writel(hsotg, GINTSTS_RESTOREDONE, GINTMSK); in dwc2_restore_essential_regs()
287 dwc2_writel(hsotg, gr->gusbcfg, GUSBCFG); in dwc2_restore_essential_regs()
290 dwc2_writel(hsotg, hr->hcfg, HCFG); in dwc2_restore_essential_regs()
293 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_restore_essential_regs()
297 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_restore_essential_regs()
300 dwc2_writel(hsotg, dr->dcfg, DCFG); in dwc2_restore_essential_regs()
303 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_restore_essential_regs()
307 dwc2_writel(hsotg, pcgcctl, PCGCTL); in dwc2_restore_essential_regs()
319 void dwc2_hib_restore_common(struct dwc2_hsotg *hsotg, int rem_wakeup, in dwc2_hib_restore_common() argument
325 gpwrdn = dwc2_readl(hsotg, GPWRDN); in dwc2_hib_restore_common()
327 dwc2_writel(hsotg, gpwrdn, GPWRDN); in dwc2_hib_restore_common()
331 gpwrdn = dwc2_readl(hsotg, GPWRDN); in dwc2_hib_restore_common()
333 dwc2_writel(hsotg, gpwrdn, GPWRDN); in dwc2_hib_restore_common()
337 gpwrdn = dwc2_readl(hsotg, GPWRDN); in dwc2_hib_restore_common()
339 dwc2_writel(hsotg, gpwrdn, GPWRDN); in dwc2_hib_restore_common()
343 gpwrdn = dwc2_readl(hsotg, GPWRDN); in dwc2_hib_restore_common()
345 dwc2_writel(hsotg, gpwrdn, GPWRDN); in dwc2_hib_restore_common()
352 gpwrdn = dwc2_readl(hsotg, GPWRDN); in dwc2_hib_restore_common()
354 dwc2_writel(hsotg, gpwrdn, GPWRDN); in dwc2_hib_restore_common()
358 gpwrdn = dwc2_readl(hsotg, GPWRDN); in dwc2_hib_restore_common()
360 dwc2_writel(hsotg, gpwrdn, GPWRDN); in dwc2_hib_restore_common()
364 dwc2_restore_essential_regs(hsotg, rem_wakeup, is_host); in dwc2_hib_restore_common()
370 if (dwc2_hsotg_wait_bit_set(hsotg, GINTSTS, GINTSTS_RESTOREDONE, in dwc2_hib_restore_common()
372 dev_dbg(hsotg->dev, in dwc2_hib_restore_common()
376 dev_dbg(hsotg->dev, "restore done generated here\n"); in dwc2_hib_restore_common()
385 static void dwc2_wait_for_mode(struct dwc2_hsotg *hsotg, in dwc2_wait_for_mode() argument
392 dev_vdbg(hsotg->dev, "Waiting for %s mode\n", in dwc2_wait_for_mode()
400 if (dwc2_is_host_mode(hsotg) == host_mode) { in dwc2_wait_for_mode()
401 dev_vdbg(hsotg->dev, "%s mode set\n", in dwc2_wait_for_mode()
410 dev_warn(hsotg->dev, "%s: Couldn't set %s mode\n", in dwc2_wait_for_mode()
425 static bool dwc2_iddig_filter_enabled(struct dwc2_hsotg *hsotg) in dwc2_iddig_filter_enabled() argument
430 if (!dwc2_hw_is_otg(hsotg)) in dwc2_iddig_filter_enabled()
434 ghwcfg4 = dwc2_readl(hsotg, GHWCFG4); in dwc2_iddig_filter_enabled()
442 gsnpsid = dwc2_readl(hsotg, GSNPSID); in dwc2_iddig_filter_enabled()
444 u32 gotgctl = dwc2_readl(hsotg, GOTGCTL); in dwc2_iddig_filter_enabled()
461 int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg, int is_host) in dwc2_enter_hibernation() argument
463 if (hsotg->params.power_down != DWC2_POWER_DOWN_PARAM_HIBERNATION) in dwc2_enter_hibernation()
467 return dwc2_host_enter_hibernation(hsotg); in dwc2_enter_hibernation()
469 return dwc2_gadget_enter_hibernation(hsotg); in dwc2_enter_hibernation()
482 int dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, int rem_wakeup, in dwc2_exit_hibernation() argument
486 return dwc2_host_exit_hibernation(hsotg, rem_wakeup, reset); in dwc2_exit_hibernation()
488 return dwc2_gadget_exit_hibernation(hsotg, rem_wakeup, reset); in dwc2_exit_hibernation()
495 int dwc2_core_reset(struct dwc2_hsotg *hsotg, bool skip_wait) in dwc2_core_reset() argument
500 dev_vdbg(hsotg->dev, "%s()\n", __func__); in dwc2_core_reset()
512 if (dwc2_iddig_filter_enabled(hsotg)) { in dwc2_core_reset()
513 u32 gotgctl = dwc2_readl(hsotg, GOTGCTL); in dwc2_core_reset()
514 u32 gusbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_core_reset()
523 greset = dwc2_readl(hsotg, GRSTCTL); in dwc2_core_reset()
525 dwc2_writel(hsotg, greset, GRSTCTL); in dwc2_core_reset()
527 if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_CSFTRST, 50)) { in dwc2_core_reset()
528 dev_warn(hsotg->dev, "%s: HANG! Soft Reset timeout GRSTCTL GRSTCTL_CSFTRST\n", in dwc2_core_reset()
534 if (dwc2_hsotg_wait_bit_set(hsotg, GRSTCTL, GRSTCTL_AHBIDLE, 10000)) { in dwc2_core_reset()
535 dev_warn(hsotg->dev, "%s: HANG! AHB Idle timeout GRSTCTL GRSTCTL_AHBIDLE\n", in dwc2_core_reset()
541 dwc2_wait_for_mode(hsotg, true); in dwc2_core_reset()
573 void dwc2_force_mode(struct dwc2_hsotg *hsotg, bool host) in dwc2_force_mode() argument
579 dev_dbg(hsotg->dev, "Forcing mode to %s\n", host ? "host" : "device"); in dwc2_force_mode()
584 if (!dwc2_hw_is_otg(hsotg)) in dwc2_force_mode()
591 if (WARN_ON(host && hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)) in dwc2_force_mode()
594 if (WARN_ON(!host && hsotg->dr_mode == USB_DR_MODE_HOST)) in dwc2_force_mode()
597 gusbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_force_mode()
604 dwc2_writel(hsotg, gusbcfg, GUSBCFG); in dwc2_force_mode()
606 dwc2_wait_for_mode(hsotg, host); in dwc2_force_mode()
621 static void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg) in dwc2_clear_force_mode() argument
625 if (!dwc2_hw_is_otg(hsotg)) in dwc2_clear_force_mode()
628 dev_dbg(hsotg->dev, "Clearing force mode bits\n"); in dwc2_clear_force_mode()
630 gusbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_clear_force_mode()
633 dwc2_writel(hsotg, gusbcfg, GUSBCFG); in dwc2_clear_force_mode()
635 if (dwc2_iddig_filter_enabled(hsotg)) in dwc2_clear_force_mode()
642 void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg) in dwc2_force_dr_mode() argument
644 switch (hsotg->dr_mode) { in dwc2_force_dr_mode()
650 if (!dwc2_hw_is_otg(hsotg)) in dwc2_force_dr_mode()
655 dwc2_force_mode(hsotg, false); in dwc2_force_dr_mode()
658 dwc2_clear_force_mode(hsotg); in dwc2_force_dr_mode()
661 dev_warn(hsotg->dev, "%s() Invalid dr_mode=%d\n", in dwc2_force_dr_mode()
662 __func__, hsotg->dr_mode); in dwc2_force_dr_mode()
670 void dwc2_enable_acg(struct dwc2_hsotg *hsotg) in dwc2_enable_acg() argument
672 if (hsotg->params.acg_enable) { in dwc2_enable_acg()
673 u32 pcgcctl1 = dwc2_readl(hsotg, PCGCCTL1); in dwc2_enable_acg()
675 dev_dbg(hsotg->dev, "Enabling Active Clock Gating\n"); in dwc2_enable_acg()
677 dwc2_writel(hsotg, pcgcctl1, PCGCCTL1); in dwc2_enable_acg()
689 void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg) in dwc2_dump_host_registers() argument
695 dev_dbg(hsotg->dev, "Host Global Registers\n"); in dwc2_dump_host_registers()
696 addr = hsotg->regs + HCFG; in dwc2_dump_host_registers()
697 dev_dbg(hsotg->dev, "HCFG @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
698 (unsigned long)addr, dwc2_readl(hsotg, HCFG)); in dwc2_dump_host_registers()
699 addr = hsotg->regs + HFIR; in dwc2_dump_host_registers()
700 dev_dbg(hsotg->dev, "HFIR @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
701 (unsigned long)addr, dwc2_readl(hsotg, HFIR)); in dwc2_dump_host_registers()
702 addr = hsotg->regs + HFNUM; in dwc2_dump_host_registers()
703 dev_dbg(hsotg->dev, "HFNUM @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
704 (unsigned long)addr, dwc2_readl(hsotg, HFNUM)); in dwc2_dump_host_registers()
705 addr = hsotg->regs + HPTXSTS; in dwc2_dump_host_registers()
706 dev_dbg(hsotg->dev, "HPTXSTS @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
707 (unsigned long)addr, dwc2_readl(hsotg, HPTXSTS)); in dwc2_dump_host_registers()
708 addr = hsotg->regs + HAINT; in dwc2_dump_host_registers()
709 dev_dbg(hsotg->dev, "HAINT @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
710 (unsigned long)addr, dwc2_readl(hsotg, HAINT)); in dwc2_dump_host_registers()
711 addr = hsotg->regs + HAINTMSK; in dwc2_dump_host_registers()
712 dev_dbg(hsotg->dev, "HAINTMSK @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
713 (unsigned long)addr, dwc2_readl(hsotg, HAINTMSK)); in dwc2_dump_host_registers()
714 if (hsotg->params.dma_desc_enable) { in dwc2_dump_host_registers()
715 addr = hsotg->regs + HFLBADDR; in dwc2_dump_host_registers()
716 dev_dbg(hsotg->dev, "HFLBADDR @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
717 (unsigned long)addr, dwc2_readl(hsotg, HFLBADDR)); in dwc2_dump_host_registers()
720 addr = hsotg->regs + HPRT0; in dwc2_dump_host_registers()
721 dev_dbg(hsotg->dev, "HPRT0 @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
722 (unsigned long)addr, dwc2_readl(hsotg, HPRT0)); in dwc2_dump_host_registers()
724 for (i = 0; i < hsotg->params.host_channels; i++) { in dwc2_dump_host_registers()
725 dev_dbg(hsotg->dev, "Host Channel %d Specific Registers\n", i); in dwc2_dump_host_registers()
726 addr = hsotg->regs + HCCHAR(i); in dwc2_dump_host_registers()
727 dev_dbg(hsotg->dev, "HCCHAR @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
728 (unsigned long)addr, dwc2_readl(hsotg, HCCHAR(i))); in dwc2_dump_host_registers()
729 addr = hsotg->regs + HCSPLT(i); in dwc2_dump_host_registers()
730 dev_dbg(hsotg->dev, "HCSPLT @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
731 (unsigned long)addr, dwc2_readl(hsotg, HCSPLT(i))); in dwc2_dump_host_registers()
732 addr = hsotg->regs + HCINT(i); in dwc2_dump_host_registers()
733 dev_dbg(hsotg->dev, "HCINT @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
734 (unsigned long)addr, dwc2_readl(hsotg, HCINT(i))); in dwc2_dump_host_registers()
735 addr = hsotg->regs + HCINTMSK(i); in dwc2_dump_host_registers()
736 dev_dbg(hsotg->dev, "HCINTMSK @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
737 (unsigned long)addr, dwc2_readl(hsotg, HCINTMSK(i))); in dwc2_dump_host_registers()
738 addr = hsotg->regs + HCTSIZ(i); in dwc2_dump_host_registers()
739 dev_dbg(hsotg->dev, "HCTSIZ @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
740 (unsigned long)addr, dwc2_readl(hsotg, HCTSIZ(i))); in dwc2_dump_host_registers()
741 addr = hsotg->regs + HCDMA(i); in dwc2_dump_host_registers()
742 dev_dbg(hsotg->dev, "HCDMA @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
743 (unsigned long)addr, dwc2_readl(hsotg, HCDMA(i))); in dwc2_dump_host_registers()
744 if (hsotg->params.dma_desc_enable) { in dwc2_dump_host_registers()
745 addr = hsotg->regs + HCDMAB(i); in dwc2_dump_host_registers()
746 dev_dbg(hsotg->dev, "HCDMAB @0x%08lX : 0x%08X\n", in dwc2_dump_host_registers()
747 (unsigned long)addr, dwc2_readl(hsotg, in dwc2_dump_host_registers()
762 void dwc2_dump_global_registers(struct dwc2_hsotg *hsotg) in dwc2_dump_global_registers() argument
767 dev_dbg(hsotg->dev, "Core Global Registers\n"); in dwc2_dump_global_registers()
768 addr = hsotg->regs + GOTGCTL; in dwc2_dump_global_registers()
769 dev_dbg(hsotg->dev, "GOTGCTL @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
770 (unsigned long)addr, dwc2_readl(hsotg, GOTGCTL)); in dwc2_dump_global_registers()
771 addr = hsotg->regs + GOTGINT; in dwc2_dump_global_registers()
772 dev_dbg(hsotg->dev, "GOTGINT @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
773 (unsigned long)addr, dwc2_readl(hsotg, GOTGINT)); in dwc2_dump_global_registers()
774 addr = hsotg->regs + GAHBCFG; in dwc2_dump_global_registers()
775 dev_dbg(hsotg->dev, "GAHBCFG @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
776 (unsigned long)addr, dwc2_readl(hsotg, GAHBCFG)); in dwc2_dump_global_registers()
777 addr = hsotg->regs + GUSBCFG; in dwc2_dump_global_registers()
778 dev_dbg(hsotg->dev, "GUSBCFG @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
779 (unsigned long)addr, dwc2_readl(hsotg, GUSBCFG)); in dwc2_dump_global_registers()
780 addr = hsotg->regs + GRSTCTL; in dwc2_dump_global_registers()
781 dev_dbg(hsotg->dev, "GRSTCTL @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
782 (unsigned long)addr, dwc2_readl(hsotg, GRSTCTL)); in dwc2_dump_global_registers()
783 addr = hsotg->regs + GINTSTS; in dwc2_dump_global_registers()
784 dev_dbg(hsotg->dev, "GINTSTS @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
785 (unsigned long)addr, dwc2_readl(hsotg, GINTSTS)); in dwc2_dump_global_registers()
786 addr = hsotg->regs + GINTMSK; in dwc2_dump_global_registers()
787 dev_dbg(hsotg->dev, "GINTMSK @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
788 (unsigned long)addr, dwc2_readl(hsotg, GINTMSK)); in dwc2_dump_global_registers()
789 addr = hsotg->regs + GRXSTSR; in dwc2_dump_global_registers()
790 dev_dbg(hsotg->dev, "GRXSTSR @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
791 (unsigned long)addr, dwc2_readl(hsotg, GRXSTSR)); in dwc2_dump_global_registers()
792 addr = hsotg->regs + GRXFSIZ; in dwc2_dump_global_registers()
793 dev_dbg(hsotg->dev, "GRXFSIZ @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
794 (unsigned long)addr, dwc2_readl(hsotg, GRXFSIZ)); in dwc2_dump_global_registers()
795 addr = hsotg->regs + GNPTXFSIZ; in dwc2_dump_global_registers()
796 dev_dbg(hsotg->dev, "GNPTXFSIZ @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
797 (unsigned long)addr, dwc2_readl(hsotg, GNPTXFSIZ)); in dwc2_dump_global_registers()
798 addr = hsotg->regs + GNPTXSTS; in dwc2_dump_global_registers()
799 dev_dbg(hsotg->dev, "GNPTXSTS @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
800 (unsigned long)addr, dwc2_readl(hsotg, GNPTXSTS)); in dwc2_dump_global_registers()
801 addr = hsotg->regs + GI2CCTL; in dwc2_dump_global_registers()
802 dev_dbg(hsotg->dev, "GI2CCTL @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
803 (unsigned long)addr, dwc2_readl(hsotg, GI2CCTL)); in dwc2_dump_global_registers()
804 addr = hsotg->regs + GPVNDCTL; in dwc2_dump_global_registers()
805 dev_dbg(hsotg->dev, "GPVNDCTL @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
806 (unsigned long)addr, dwc2_readl(hsotg, GPVNDCTL)); in dwc2_dump_global_registers()
807 addr = hsotg->regs + GGPIO; in dwc2_dump_global_registers()
808 dev_dbg(hsotg->dev, "GGPIO @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
809 (unsigned long)addr, dwc2_readl(hsotg, GGPIO)); in dwc2_dump_global_registers()
810 addr = hsotg->regs + GUID; in dwc2_dump_global_registers()
811 dev_dbg(hsotg->dev, "GUID @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
812 (unsigned long)addr, dwc2_readl(hsotg, GUID)); in dwc2_dump_global_registers()
813 addr = hsotg->regs + GSNPSID; in dwc2_dump_global_registers()
814 dev_dbg(hsotg->dev, "GSNPSID @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
815 (unsigned long)addr, dwc2_readl(hsotg, GSNPSID)); in dwc2_dump_global_registers()
816 addr = hsotg->regs + GHWCFG1; in dwc2_dump_global_registers()
817 dev_dbg(hsotg->dev, "GHWCFG1 @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
818 (unsigned long)addr, dwc2_readl(hsotg, GHWCFG1)); in dwc2_dump_global_registers()
819 addr = hsotg->regs + GHWCFG2; in dwc2_dump_global_registers()
820 dev_dbg(hsotg->dev, "GHWCFG2 @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
821 (unsigned long)addr, dwc2_readl(hsotg, GHWCFG2)); in dwc2_dump_global_registers()
822 addr = hsotg->regs + GHWCFG3; in dwc2_dump_global_registers()
823 dev_dbg(hsotg->dev, "GHWCFG3 @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
824 (unsigned long)addr, dwc2_readl(hsotg, GHWCFG3)); in dwc2_dump_global_registers()
825 addr = hsotg->regs + GHWCFG4; in dwc2_dump_global_registers()
826 dev_dbg(hsotg->dev, "GHWCFG4 @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
827 (unsigned long)addr, dwc2_readl(hsotg, GHWCFG4)); in dwc2_dump_global_registers()
828 addr = hsotg->regs + GLPMCFG; in dwc2_dump_global_registers()
829 dev_dbg(hsotg->dev, "GLPMCFG @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
830 (unsigned long)addr, dwc2_readl(hsotg, GLPMCFG)); in dwc2_dump_global_registers()
831 addr = hsotg->regs + GPWRDN; in dwc2_dump_global_registers()
832 dev_dbg(hsotg->dev, "GPWRDN @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
833 (unsigned long)addr, dwc2_readl(hsotg, GPWRDN)); in dwc2_dump_global_registers()
834 addr = hsotg->regs + GDFIFOCFG; in dwc2_dump_global_registers()
835 dev_dbg(hsotg->dev, "GDFIFOCFG @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
836 (unsigned long)addr, dwc2_readl(hsotg, GDFIFOCFG)); in dwc2_dump_global_registers()
837 addr = hsotg->regs + HPTXFSIZ; in dwc2_dump_global_registers()
838 dev_dbg(hsotg->dev, "HPTXFSIZ @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
839 (unsigned long)addr, dwc2_readl(hsotg, HPTXFSIZ)); in dwc2_dump_global_registers()
841 addr = hsotg->regs + PCGCTL; in dwc2_dump_global_registers()
842 dev_dbg(hsotg->dev, "PCGCTL @0x%08lX : 0x%08X\n", in dwc2_dump_global_registers()
843 (unsigned long)addr, dwc2_readl(hsotg, PCGCTL)); in dwc2_dump_global_registers()
853 void dwc2_flush_tx_fifo(struct dwc2_hsotg *hsotg, const int num) in dwc2_flush_tx_fifo() argument
857 dev_vdbg(hsotg->dev, "Flush Tx FIFO %d\n", num); in dwc2_flush_tx_fifo()
860 if (dwc2_hsotg_wait_bit_set(hsotg, GRSTCTL, GRSTCTL_AHBIDLE, 10000)) in dwc2_flush_tx_fifo()
861 dev_warn(hsotg->dev, "%s: HANG! AHB Idle GRSCTL\n", in dwc2_flush_tx_fifo()
866 dwc2_writel(hsotg, greset, GRSTCTL); in dwc2_flush_tx_fifo()
868 if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_TXFFLSH, 10000)) in dwc2_flush_tx_fifo()
869 dev_warn(hsotg->dev, "%s: HANG! timeout GRSTCTL GRSTCTL_TXFFLSH\n", in dwc2_flush_tx_fifo()
881 void dwc2_flush_rx_fifo(struct dwc2_hsotg *hsotg) in dwc2_flush_rx_fifo() argument
885 dev_vdbg(hsotg->dev, "%s()\n", __func__); in dwc2_flush_rx_fifo()
888 if (dwc2_hsotg_wait_bit_set(hsotg, GRSTCTL, GRSTCTL_AHBIDLE, 10000)) in dwc2_flush_rx_fifo()
889 dev_warn(hsotg->dev, "%s: HANG! AHB Idle GRSCTL\n", in dwc2_flush_rx_fifo()
893 dwc2_writel(hsotg, greset, GRSTCTL); in dwc2_flush_rx_fifo()
896 if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_RXFFLSH, 10000)) in dwc2_flush_rx_fifo()
897 dev_warn(hsotg->dev, "%s: HANG! timeout GRSTCTL GRSTCTL_RXFFLSH\n", in dwc2_flush_rx_fifo()
904 bool dwc2_is_controller_alive(struct dwc2_hsotg *hsotg) in dwc2_is_controller_alive() argument
906 if (dwc2_readl(hsotg, GSNPSID) == 0xffffffff) in dwc2_is_controller_alive()
918 void dwc2_enable_global_interrupts(struct dwc2_hsotg *hsotg) in dwc2_enable_global_interrupts() argument
920 u32 ahbcfg = dwc2_readl(hsotg, GAHBCFG); in dwc2_enable_global_interrupts()
923 dwc2_writel(hsotg, ahbcfg, GAHBCFG); in dwc2_enable_global_interrupts()
932 void dwc2_disable_global_interrupts(struct dwc2_hsotg *hsotg) in dwc2_disable_global_interrupts() argument
934 u32 ahbcfg = dwc2_readl(hsotg, GAHBCFG); in dwc2_disable_global_interrupts()
937 dwc2_writel(hsotg, ahbcfg, GAHBCFG); in dwc2_disable_global_interrupts()
941 unsigned int dwc2_op_mode(struct dwc2_hsotg *hsotg) in dwc2_op_mode() argument
943 u32 ghwcfg2 = dwc2_readl(hsotg, GHWCFG2); in dwc2_op_mode()
950 bool dwc2_hw_is_otg(struct dwc2_hsotg *hsotg) in dwc2_hw_is_otg() argument
952 unsigned int op_mode = dwc2_op_mode(hsotg); in dwc2_hw_is_otg()
960 bool dwc2_hw_is_host(struct dwc2_hsotg *hsotg) in dwc2_hw_is_host() argument
962 unsigned int op_mode = dwc2_op_mode(hsotg); in dwc2_hw_is_host()
969 bool dwc2_hw_is_device(struct dwc2_hsotg *hsotg) in dwc2_hw_is_device() argument
971 unsigned int op_mode = dwc2_op_mode(hsotg); in dwc2_hw_is_device()
986 int dwc2_hsotg_wait_bit_set(struct dwc2_hsotg *hsotg, u32 offset, u32 mask, in dwc2_hsotg_wait_bit_set() argument
992 if (dwc2_readl(hsotg, offset) & mask) in dwc2_hsotg_wait_bit_set()
1009 int dwc2_hsotg_wait_bit_clear(struct dwc2_hsotg *hsotg, u32 offset, u32 mask, in dwc2_hsotg_wait_bit_clear() argument
1015 if (!(dwc2_readl(hsotg, offset) & mask)) in dwc2_hsotg_wait_bit_clear()
1027 void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg *hsotg) in dwc2_init_fs_ls_pclk_sel() argument
1031 if ((hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && in dwc2_init_fs_ls_pclk_sel()
1032 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED && in dwc2_init_fs_ls_pclk_sel()
1033 hsotg->params.ulpi_fs_ls) || in dwc2_init_fs_ls_pclk_sel()
1034 hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS) { in dwc2_init_fs_ls_pclk_sel()
1042 dev_dbg(hsotg->dev, "Initializing HCFG.FSLSPClkSel to %08x\n", val); in dwc2_init_fs_ls_pclk_sel()
1043 hcfg = dwc2_readl(hsotg, HCFG); in dwc2_init_fs_ls_pclk_sel()
1046 dwc2_writel(hsotg, hcfg, HCFG); in dwc2_init_fs_ls_pclk_sel()
1049 static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) in dwc2_fs_phy_init() argument
1059 dev_dbg(hsotg->dev, "FS PHY selected\n"); in dwc2_fs_phy_init()
1061 usbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_fs_phy_init()
1064 dwc2_writel(hsotg, usbcfg, GUSBCFG); in dwc2_fs_phy_init()
1067 retval = dwc2_core_reset(hsotg, false); in dwc2_fs_phy_init()
1070 dev_err(hsotg->dev, in dwc2_fs_phy_init()
1076 if (hsotg->params.activate_stm_fs_transceiver) { in dwc2_fs_phy_init()
1077 ggpio = dwc2_readl(hsotg, GGPIO); in dwc2_fs_phy_init()
1079 dev_dbg(hsotg->dev, "Activating transceiver\n"); in dwc2_fs_phy_init()
1085 dwc2_writel(hsotg, ggpio, GGPIO); in dwc2_fs_phy_init()
1095 if (dwc2_is_host_mode(hsotg)) in dwc2_fs_phy_init()
1096 dwc2_init_fs_ls_pclk_sel(hsotg); in dwc2_fs_phy_init()
1098 if (hsotg->params.i2c_enable) { in dwc2_fs_phy_init()
1099 dev_dbg(hsotg->dev, "FS PHY enabling I2C\n"); in dwc2_fs_phy_init()
1102 usbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_fs_phy_init()
1104 dwc2_writel(hsotg, usbcfg, GUSBCFG); in dwc2_fs_phy_init()
1107 i2cctl = dwc2_readl(hsotg, GI2CCTL); in dwc2_fs_phy_init()
1111 dwc2_writel(hsotg, i2cctl, GI2CCTL); in dwc2_fs_phy_init()
1113 dwc2_writel(hsotg, i2cctl, GI2CCTL); in dwc2_fs_phy_init()
1119 static int dwc2_hs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) in dwc2_hs_phy_init() argument
1127 usbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_hs_phy_init()
1135 switch (hsotg->params.phy_type) { in dwc2_hs_phy_init()
1138 dev_dbg(hsotg->dev, "HS ULPI PHY selected\n"); in dwc2_hs_phy_init()
1141 if (hsotg->params.phy_ulpi_ddr) in dwc2_hs_phy_init()
1145 if (hsotg->params.oc_disable) in dwc2_hs_phy_init()
1151 dev_dbg(hsotg->dev, "HS UTMI+ PHY selected\n"); in dwc2_hs_phy_init()
1153 if (hsotg->params.phy_utmi_width == 16) in dwc2_hs_phy_init()
1157 if (dwc2_is_device_mode(hsotg)) { in dwc2_hs_phy_init()
1159 if (hsotg->params.phy_utmi_width == 16) in dwc2_hs_phy_init()
1166 dev_err(hsotg->dev, "FS PHY selected at HS!\n"); in dwc2_hs_phy_init()
1171 dwc2_writel(hsotg, usbcfg, GUSBCFG); in dwc2_hs_phy_init()
1174 retval = dwc2_core_reset(hsotg, false); in dwc2_hs_phy_init()
1176 dev_err(hsotg->dev, in dwc2_hs_phy_init()
1185 int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) in dwc2_phy_init() argument
1190 if ((hsotg->params.speed == DWC2_SPEED_PARAM_FULL || in dwc2_phy_init()
1191 hsotg->params.speed == DWC2_SPEED_PARAM_LOW) && in dwc2_phy_init()
1192 hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS) { in dwc2_phy_init()
1194 retval = dwc2_fs_phy_init(hsotg, select_phy); in dwc2_phy_init()
1199 retval = dwc2_hs_phy_init(hsotg, select_phy); in dwc2_phy_init()
1204 if (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && in dwc2_phy_init()
1205 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED && in dwc2_phy_init()
1206 hsotg->params.ulpi_fs_ls) { in dwc2_phy_init()
1207 dev_dbg(hsotg->dev, "Setting ULPI FSLS\n"); in dwc2_phy_init()
1208 usbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_phy_init()
1211 dwc2_writel(hsotg, usbcfg, GUSBCFG); in dwc2_phy_init()
1213 usbcfg = dwc2_readl(hsotg, GUSBCFG); in dwc2_phy_init()
1216 dwc2_writel(hsotg, usbcfg, GUSBCFG); in dwc2_phy_init()