218 	unsigned char ie1_value;  member
2085 	unsigned char status = read_reg(info, SR1) & info->ie1_value & (FLGD + IDLD + CDCD + BRKD);  in isr_rxint()
2220 	info->ie1_value &= ~(IDLE + UDRN);  in isr_txeom()
2221 	write_reg16(info, IE0, (unsigned short)((info->ie1_value << 8) + info->ie0_value));  in isr_txeom()
2264 	unsigned char status = read_reg(info, SR1) & info->ie1_value & (UDRN + IDLE + CCTS);  in isr_txint()
2299 		info->ie1_value |= IDLE;  in isr_txrdy()
2300 		write_reg16(info, IE0, (unsigned short)((info->ie1_value << 8) + info->ie0_value));  in isr_txrdy()
2419 				info->ie1_value &= ~CDCD;  in isr_io_pin()
2420 				write_reg(info, IE1, info->ie1_value);  in isr_io_pin()
2439 				info->ie1_value &= ~CCTS;  in isr_io_pin()
2440 				write_reg(info, IE1, info->ie1_value);  in isr_io_pin()
2719 	info->ie1_value |= (CDCD|CCTS);  in program_hw()
2720 	write_reg(info, IE1, info->ie1_value);  in program_hw()
2961 		info->ie1_value &= ~UDRN;  in tx_abort()
2962 		info->ie1_value |= IDLE;  in tx_abort()
2963 		write_reg(info, IE1, info->ie1_value);	/* disable tx status interrupts */  in tx_abort()
3039 		unsigned char oldval = info->ie1_value;  in wait_mgsl_event()
3044 			info->ie1_value = newval;  in wait_mgsl_event()
3045 			write_reg(info, IE1, info->ie1_value);  in wait_mgsl_event()
3109 			info->ie1_value &= ~(FLGD|IDLD);  in wait_mgsl_event()
3110 			write_reg(info, IE1, info->ie1_value);  in wait_mgsl_event()
4225 			info->ie1_value &= ~IDLE;  in tx_start()
4226 			info->ie1_value |= UDRN;  in tx_start()
4227 			write_reg(info, IE1, info->ie1_value);  in tx_start()
4262 	info->ie1_value &= ~(UDRN + IDLE);  in tx_stop()
4263 	write_reg(info, IE1, info->ie1_value);	/* disable tx status interrupts */  in tx_stop()
4337 		info->ie1_value = 0;  in reset_port()
4340 		write_reg(info, IE1, info->ie1_value);  in reset_port()
4488 	info->ie1_value = BRKD;  in async_mode()
4489 	write_reg(info, IE1, info->ie1_value);  in async_mode()