4469 static void usc_OutDmaReg( struct mgsl_struct *info, u16 RegAddr, u16 RegValue )  in usc_OutDmaReg()  argument
4475 	outw( RegValue, info->io_base );  in usc_OutDmaReg()
4525 static void usc_OutReg( struct mgsl_struct *info, u16 RegAddr, u16 RegValue )  in usc_OutReg()  argument
4528 	outw( RegValue, info->io_base + CCAR );  in usc_OutReg()
4566 	u16 RegValue;  in usc_set_sdlc_mode()  local
4579 	RegValue=usc_InReg(info,TMDR);  in usc_set_sdlc_mode()
4580 	PreSL1660 = (RegValue == IUSC_PRE_SL1660);  in usc_set_sdlc_mode()
4596  	   RegValue = 0x8e06;  in usc_set_sdlc_mode()
4617 			RegValue = 0x0001;		/* Set Receive mode = external sync */  in usc_set_sdlc_mode()
4634 			RegValue |= 0x0400;  in usc_set_sdlc_mode()
4638 		RegValue = 0x0606;  in usc_set_sdlc_mode()
4641 			RegValue |= BIT14;  in usc_set_sdlc_mode()
4643 			RegValue |= BIT15;  in usc_set_sdlc_mode()
4645 			RegValue |= BIT15 | BIT14;  in usc_set_sdlc_mode()
4649 			RegValue |= BIT13;  in usc_set_sdlc_mode()
4654 		RegValue |= BIT12;  in usc_set_sdlc_mode()
4660 		RegValue |= BIT4;  in usc_set_sdlc_mode()
4663 	usc_OutReg( info, CMR, RegValue );  in usc_set_sdlc_mode()
4664 	info->cmr_value = RegValue;  in usc_set_sdlc_mode()
4681 	RegValue = 0x0500;  in usc_set_sdlc_mode()
4684 	case HDLC_ENCODING_NRZB:               RegValue |= BIT13; break;  in usc_set_sdlc_mode()
4685 	case HDLC_ENCODING_NRZI_MARK:          RegValue |= BIT14; break;  in usc_set_sdlc_mode()
4686 	case HDLC_ENCODING_NRZI_SPACE:	       RegValue |= BIT14 | BIT13; break;  in usc_set_sdlc_mode()
4687 	case HDLC_ENCODING_BIPHASE_MARK:       RegValue |= BIT15; break;  in usc_set_sdlc_mode()
4688 	case HDLC_ENCODING_BIPHASE_SPACE:      RegValue |= BIT15 | BIT13; break;  in usc_set_sdlc_mode()
4689 	case HDLC_ENCODING_BIPHASE_LEVEL:      RegValue |= BIT15 | BIT14; break;  in usc_set_sdlc_mode()
4690 	case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14 | BIT13; break;  in usc_set_sdlc_mode()
4694 		RegValue |= BIT9;  in usc_set_sdlc_mode()
4696 		RegValue |= ( BIT12 | BIT10 | BIT9 );  in usc_set_sdlc_mode()
4698 	usc_OutReg( info, RMR, RegValue );  in usc_set_sdlc_mode()
4729 	RegValue = usc_InReg( info, RICR ) & 0xc0;  in usc_set_sdlc_mode()
4732 		usc_OutReg( info, RICR, (u16)(0x030a | RegValue) );  in usc_set_sdlc_mode()
4734 		usc_OutReg( info, RICR, (u16)(0x140a | RegValue) );  in usc_set_sdlc_mode()
4756 	RegValue = 0x0400;  in usc_set_sdlc_mode()
4759 	case HDLC_ENCODING_NRZB:               RegValue |= BIT13; break;  in usc_set_sdlc_mode()
4760 	case HDLC_ENCODING_NRZI_MARK:          RegValue |= BIT14; break;  in usc_set_sdlc_mode()
4761 	case HDLC_ENCODING_NRZI_SPACE:         RegValue |= BIT14 | BIT13; break;  in usc_set_sdlc_mode()
4762 	case HDLC_ENCODING_BIPHASE_MARK:       RegValue |= BIT15; break;  in usc_set_sdlc_mode()
4763 	case HDLC_ENCODING_BIPHASE_SPACE:      RegValue |= BIT15 | BIT13; break;  in usc_set_sdlc_mode()
4764 	case HDLC_ENCODING_BIPHASE_LEVEL:      RegValue |= BIT15 | BIT14; break;  in usc_set_sdlc_mode()
4765 	case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14 | BIT13; break;  in usc_set_sdlc_mode()
4769 		RegValue |= BIT9 | BIT8;  in usc_set_sdlc_mode()
4771 		RegValue |= ( BIT12 | BIT10 | BIT9 | BIT8);  in usc_set_sdlc_mode()
4773 	usc_OutReg( info, TMR, RegValue );  in usc_set_sdlc_mode()
4840 	RegValue = 0x0f40;  in usc_set_sdlc_mode()
4843 		RegValue |= 0x0003;	/* RxCLK from DPLL */  in usc_set_sdlc_mode()
4845 		RegValue |= 0x0004;	/* RxCLK from BRG0 */  in usc_set_sdlc_mode()
4847  		RegValue |= 0x0006;	/* RxCLK from TXC Input */  in usc_set_sdlc_mode()
4849 		RegValue |= 0x0007;	/* RxCLK from Port1 */  in usc_set_sdlc_mode()
4852 		RegValue |= 0x0018;	/* TxCLK from DPLL */  in usc_set_sdlc_mode()
4854 		RegValue |= 0x0020;	/* TxCLK from BRG0 */  in usc_set_sdlc_mode()
4856  		RegValue |= 0x0038;	/* RxCLK from TXC Input */  in usc_set_sdlc_mode()
4858 		RegValue |= 0x0030;	/* TxCLK from Port0 */  in usc_set_sdlc_mode()
4860 	usc_OutReg( info, CMCR, RegValue );  in usc_set_sdlc_mode()
4878 	RegValue = 0x0000;  in usc_set_sdlc_mode()
4895 			RegValue |= BIT10;  in usc_set_sdlc_mode()
4899 			RegValue |= BIT11;  in usc_set_sdlc_mode()
4932 		RegValue |= BIT4;		/* enable BRG1 */  in usc_set_sdlc_mode()
4938 		case HDLC_ENCODING_NRZI_SPACE: RegValue |= BIT8; break;  in usc_set_sdlc_mode()
4940 		case HDLC_ENCODING_BIPHASE_SPACE: RegValue |= BIT9; break;  in usc_set_sdlc_mode()
4942 		case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT9 | BIT8; break;  in usc_set_sdlc_mode()
4946 	usc_OutReg( info, HCR, RegValue );  in usc_set_sdlc_mode()
5087 	RegValue = 0x8080;  in usc_set_sdlc_mode()
5090 	case HDLC_PREAMBLE_LENGTH_16BITS: RegValue |= BIT10; break;  in usc_set_sdlc_mode()
5091 	case HDLC_PREAMBLE_LENGTH_32BITS: RegValue |= BIT11; break;  in usc_set_sdlc_mode()
5092 	case HDLC_PREAMBLE_LENGTH_64BITS: RegValue |= BIT11 | BIT10; break;  in usc_set_sdlc_mode()
5096 	case HDLC_PREAMBLE_PATTERN_FLAGS: RegValue |= BIT8 | BIT12; break;  in usc_set_sdlc_mode()
5097 	case HDLC_PREAMBLE_PATTERN_ONES:  RegValue |= BIT8; break;  in usc_set_sdlc_mode()
5098 	case HDLC_PREAMBLE_PATTERN_10:    RegValue |= BIT9; break;  in usc_set_sdlc_mode()
5099 	case HDLC_PREAMBLE_PATTERN_01:    RegValue |= BIT9 | BIT8; break;  in usc_set_sdlc_mode()
5102 	usc_OutReg( info, CCR, RegValue );  in usc_set_sdlc_mode()
5799 	u16 RegValue;  in usc_set_async_mode()  local
5821 	RegValue = 0;  in usc_set_async_mode()
5823 		RegValue |= BIT14;  in usc_set_async_mode()
5824 	usc_OutReg( info, CMR, RegValue );  in usc_set_async_mode()
5839 	RegValue = 0;  in usc_set_async_mode()
5842 		RegValue |= BIT4 | BIT3 | BIT2;  in usc_set_async_mode()
5845 		RegValue |= BIT5;  in usc_set_async_mode()
5847 			RegValue |= BIT6;  in usc_set_async_mode()
5850 	usc_OutReg( info, RMR, RegValue );  in usc_set_async_mode()
5896 	RegValue = 0;  in usc_set_async_mode()
5899 		RegValue |= BIT4 | BIT3 | BIT2;  in usc_set_async_mode()
5902 		RegValue |= BIT5;  in usc_set_async_mode()
5904 			RegValue |= BIT6;  in usc_set_async_mode()
5907 	usc_OutReg( info, TMR, RegValue );  in usc_set_async_mode()