Lines Matching refs:BIT8
502 #define RXSTATUS_SHORT_FRAME BIT8
503 #define RXSTATUS_CODE_VIOLATION BIT8
564 #define MISCSTATUS_DSR BIT8
587 #define SICR_DSR_INACTIVE BIT8
588 #define SICR_DSR (BIT9|BIT8)
1640 usc_OutDmaReg(info, CDIR, BIT8 | BIT0 ); in mgsl_isr_transmit_dma()
4769 RegValue |= BIT9 | BIT8; in usc_set_sdlc_mode()
4771 RegValue |= ( BIT12 | BIT10 | BIT9 | BIT8); in usc_set_sdlc_mode()
4938 case HDLC_ENCODING_NRZI_SPACE: RegValue |= BIT8; break; in usc_set_sdlc_mode()
4942 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT9 | BIT8; break; in usc_set_sdlc_mode()
4989 info->mbre_bit = BIT8; in usc_set_sdlc_mode()
4990 outw( BIT8, info->io_base ); /* set Master Bus Enable (DCAR) */ in usc_set_sdlc_mode()
5096 case HDLC_PREAMBLE_PATTERN_FLAGS: RegValue |= BIT8 | BIT12; break; in usc_set_sdlc_mode()
5097 case HDLC_PREAMBLE_PATTERN_ONES: RegValue |= BIT8; break; in usc_set_sdlc_mode()
5099 case HDLC_PREAMBLE_PATTERN_01: RegValue |= BIT9 | BIT8; break; in usc_set_sdlc_mode()
6040 if (usc_InReg( info, RCSR ) & (BIT8 | BIT4 | BIT3 | BIT1)) in usc_loopback_frame()
7238 if ( status & (BIT8 | BIT3 | BIT1) ) { in mgsl_dma_test()