Lines Matching defs:mgsl_struct
178 struct mgsl_struct { struct
198 struct mgsl_struct *next_device; /* device list link */ argument
200 spinlock_t irq_spinlock; /* spinlock for synchronizing with ISR */
201 struct work_struct task; /* task structure for scheduling bh */
203 u32 EventMask; /* event trigger mask */
204 u32 RecordedEvents; /* pending events */
206 u32 max_frame_size; /* as set by device config */
208 u32 pending_bh;
210 bool bh_running; /* Protection from multiple */
211 int isr_overflow;
212 bool bh_requested;
214 int dcd_chkcount; /* check counts to prevent */
215 int cts_chkcount; /* too many IRQs if a signal */
216 int dsr_chkcount; /* is floating */
217 int ri_chkcount;
219 char *buffer_list; /* virtual address of Rx & Tx buffer lists */
220 u32 buffer_list_phys;
221 dma_addr_t buffer_list_dma_addr;
223 unsigned int rx_buffer_count; /* count of total allocated Rx buffers */
224 DMABUFFERENTRY *rx_buffer_list; /* list of receive buffer entries */
225 unsigned int current_rx_buffer;
227 int num_tx_dma_buffers; /* number of tx dma frames required */
228 int tx_dma_buffers_used;
229 unsigned int tx_buffer_count; /* count of total allocated Tx buffers */
230 DMABUFFERENTRY *tx_buffer_list; /* list of transmit buffer entries */
231 int start_tx_dma_buffer; /* tx dma buffer to start tx dma operation */
232 int current_tx_buffer; /* next tx dma buffer to be loaded */
234 unsigned char *intermediate_rxbuffer;
236 int num_tx_holding_buffers; /* number of tx holding buffer allocated */
237 int get_tx_holding_index; /* next tx holding buffer for adapter to load */
238 int put_tx_holding_index; /* next tx holding buffer to store user request */
239 int tx_holding_count; /* number of tx holding buffers waiting */
240 struct tx_holding_buffer tx_holding_buffers[MAX_TX_HOLDING_BUFFERS];
242 bool rx_enabled;
243 bool rx_overflow;
244 bool rx_rcc_underrun;
246 bool tx_enabled;
247 bool tx_active;
248 u32 idle_mode;
250 u16 cmr_value;
251 u16 tcsr_value;
253 char device_name[25]; /* device instance name */
255 unsigned int bus_type; /* expansion bus type (ISA,EISA,PCI) */
256 unsigned char bus; /* expansion bus number (zero based) */
257 unsigned char function; /* PCI device number */
259 unsigned int io_base; /* base I/O address of adapter */
260 unsigned int io_addr_size; /* size of the I/O address range */
261 bool io_addr_requested; /* true if I/O address requested */
263 unsigned int irq_level; /* interrupt level */
264 unsigned long irq_flags;
265 bool irq_requested; /* true if IRQ requested */
267 unsigned int dma_level; /* DMA channel */
268 bool dma_requested; /* true if dma channel requested */
270 u16 mbre_bit;
271 u16 loopback_bits;
272 u16 usc_idle_mode;
274 MGSL_PARAMS params; /* communications parameters */
276 unsigned char serial_signals; /* current serial signal states */
278 bool irq_occurred; /* for diagnostics use */
279 unsigned int init_error; /* Initialization startup error (DIAGS) */
280 int fDiagnosticsmode; /* Driver in Diagnostic mode? (DIAGS) */
282 u32 last_mem_alloc;
283 unsigned char* memory_base; /* shared memory address (PCI only) */
284 u32 phys_memory_base;
285 bool shared_mem_requested;
287 unsigned char* lcr_base; /* local config registers (PCI only) */
288 u32 phys_lcr_base;
289 u32 lcr_offset;
290 bool lcr_mem_requested;
292 u32 misc_ctrl_value;
293 char *flag_buf;
294 bool drop_rts_on_tx_done;
296 bool loopmode_insert_requested;
297 bool loopmode_send_done_requested;
299 struct _input_signal_events input_signal_events;
302 int netcount;
303 spinlock_t netlock;
306 struct net_device *netdev;