97 #define ZS_IS_CONS(UP)	((UP)->flags & IP22ZILOG_FLAG_IS_CONS)  argument
98 #define ZS_IS_KGDB(UP)	((UP)->flags & IP22ZILOG_FLAG_IS_KGDB)  argument
99 #define ZS_WANTS_MODEM_STATUS(UP)	((UP)->flags & IP22ZILOG_FLAG_MODEM_STATUS)  argument
100 #define ZS_IS_CHANNEL_A(UP)	((UP)->flags & IP22ZILOG_FLAG_IS_CHANNEL_A)  argument
101 #define ZS_REGS_HELD(UP)	((UP)->flags & IP22ZILOG_FLAG_REGS_HELD)  argument
102 #define ZS_TX_STOPPED(UP)	((UP)->flags & IP22ZILOG_FLAG_TX_STOPPED)  argument
103 #define ZS_TX_ACTIVE(UP)	((UP)->flags & IP22ZILOG_FLAG_TX_ACTIVE)  argument
237 static void ip22zilog_maybe_update_regs(struct uart_ip22zilog_port *up,  in ip22zilog_maybe_update_regs()  argument
240 	if (!ZS_REGS_HELD(up)) {  in ip22zilog_maybe_update_regs()
241 		if (ZS_TX_ACTIVE(up)) {  in ip22zilog_maybe_update_regs()
242 			up->flags |= IP22ZILOG_FLAG_REGS_HELD;  in ip22zilog_maybe_update_regs()
244 			__load_zsregs(channel, up->curregs);  in ip22zilog_maybe_update_regs()
252 static bool ip22zilog_receive_chars(struct uart_ip22zilog_port *up,  in ip22zilog_receive_chars()  argument
257 	bool push = up->port.state != NULL;  in ip22zilog_receive_chars()
275 		ch &= up->parity_mask;  in ip22zilog_receive_chars()
279 			r1 |= up->tty_break;  in ip22zilog_receive_chars()
283 		up->port.icount.rx++;  in ip22zilog_receive_chars()
285 			up->tty_break = 0;  in ip22zilog_receive_chars()
288 				up->port.icount.brk++;  in ip22zilog_receive_chars()
294 				up->port.icount.parity++;  in ip22zilog_receive_chars()
296 				up->port.icount.frame++;  in ip22zilog_receive_chars()
298 				up->port.icount.overrun++;  in ip22zilog_receive_chars()
299 			r1 &= up->port.read_status_mask;  in ip22zilog_receive_chars()
308 		if (uart_handle_sysrq_char(&up->port, ch))  in ip22zilog_receive_chars()
312 			uart_insert_char(&up->port, r1, Rx_OVR, ch, flag);  in ip22zilog_receive_chars()
317 static void ip22zilog_status_handle(struct uart_ip22zilog_port *up,  in ip22zilog_status_handle()  argument
329 	if (up->curregs[R15] & BRKIE) {  in ip22zilog_status_handle()
330 		if ((status & BRK_ABRT) && !(up->prev_status & BRK_ABRT)) {  in ip22zilog_status_handle()
331 			if (uart_handle_break(&up->port))  in ip22zilog_status_handle()
332 				up->tty_break = Rx_SYS;  in ip22zilog_status_handle()
334 				up->tty_break = Rx_BRK;  in ip22zilog_status_handle()
338 	if (ZS_WANTS_MODEM_STATUS(up)) {  in ip22zilog_status_handle()
340 			up->port.icount.dsr++;  in ip22zilog_status_handle()
346 		if ((status ^ up->prev_status) ^ DCD)  in ip22zilog_status_handle()
347 			uart_handle_dcd_change(&up->port,  in ip22zilog_status_handle()
349 		if ((status ^ up->prev_status) ^ CTS)  in ip22zilog_status_handle()
350 			uart_handle_cts_change(&up->port,  in ip22zilog_status_handle()
353 		wake_up_interruptible(&up->port.state->port.delta_msr_wait);  in ip22zilog_status_handle()
356 	up->prev_status = status;  in ip22zilog_status_handle()
359 static void ip22zilog_transmit_chars(struct uart_ip22zilog_port *up,  in ip22zilog_transmit_chars()  argument
364 	if (ZS_IS_CONS(up)) {  in ip22zilog_transmit_chars()
380 	up->flags &= ~IP22ZILOG_FLAG_TX_ACTIVE;  in ip22zilog_transmit_chars()
382 	if (ZS_REGS_HELD(up)) {  in ip22zilog_transmit_chars()
383 		__load_zsregs(channel, up->curregs);  in ip22zilog_transmit_chars()
384 		up->flags &= ~IP22ZILOG_FLAG_REGS_HELD;  in ip22zilog_transmit_chars()
387 	if (ZS_TX_STOPPED(up)) {  in ip22zilog_transmit_chars()
388 		up->flags &= ~IP22ZILOG_FLAG_TX_STOPPED;  in ip22zilog_transmit_chars()
392 	if (up->port.x_char) {  in ip22zilog_transmit_chars()
393 		up->flags |= IP22ZILOG_FLAG_TX_ACTIVE;  in ip22zilog_transmit_chars()
394 		writeb(up->port.x_char, &channel->data);  in ip22zilog_transmit_chars()
398 		up->port.icount.tx++;  in ip22zilog_transmit_chars()
399 		up->port.x_char = 0;  in ip22zilog_transmit_chars()
403 	if (up->port.state == NULL)  in ip22zilog_transmit_chars()
405 	xmit = &up->port.state->xmit;  in ip22zilog_transmit_chars()
408 	if (uart_tx_stopped(&up->port))  in ip22zilog_transmit_chars()
411 	up->flags |= IP22ZILOG_FLAG_TX_ACTIVE;  in ip22zilog_transmit_chars()
417 	up->port.icount.tx++;  in ip22zilog_transmit_chars()
420 		uart_write_wakeup(&up->port);  in ip22zilog_transmit_chars()
432 	struct uart_ip22zilog_port *up = dev_id;  in ip22zilog_interrupt()  local
434 	while (up) {  in ip22zilog_interrupt()
436 			= ZILOG_CHANNEL_FROM_PORT(&up->port);  in ip22zilog_interrupt()
440 		spin_lock(&up->port.lock);  in ip22zilog_interrupt()
450 				push = ip22zilog_receive_chars(up, channel);  in ip22zilog_interrupt()
452 				ip22zilog_status_handle(up, channel);  in ip22zilog_interrupt()
454 				ip22zilog_transmit_chars(up, channel);  in ip22zilog_interrupt()
456 		spin_unlock(&up->port.lock);  in ip22zilog_interrupt()
459 			tty_flip_buffer_push(&up->port.state->port);  in ip22zilog_interrupt()
462 		up = up->next;  in ip22zilog_interrupt()
463 		channel = ZILOG_CHANNEL_FROM_PORT(&up->port);  in ip22zilog_interrupt()
466 		spin_lock(&up->port.lock);  in ip22zilog_interrupt()
473 				push = ip22zilog_receive_chars(up, channel);  in ip22zilog_interrupt()
475 				ip22zilog_status_handle(up, channel);  in ip22zilog_interrupt()
477 				ip22zilog_transmit_chars(up, channel);  in ip22zilog_interrupt()
479 		spin_unlock(&up->port.lock);  in ip22zilog_interrupt()
482 			tty_flip_buffer_push(&up->port.state->port);  in ip22zilog_interrupt()
484 		up = up->next;  in ip22zilog_interrupt()
548 	struct uart_ip22zilog_port *up =  in ip22zilog_set_mctrl()  local
565 	up->curregs[R5] |= set_bits;  in ip22zilog_set_mctrl()
566 	up->curregs[R5] &= ~clear_bits;  in ip22zilog_set_mctrl()
567 	write_zsreg(channel, R5, up->curregs[R5]);  in ip22zilog_set_mctrl()
573 	struct uart_ip22zilog_port *up =  in ip22zilog_stop_tx()  local
576 	up->flags |= IP22ZILOG_FLAG_TX_STOPPED;  in ip22zilog_stop_tx()
582 	struct uart_ip22zilog_port *up =  in ip22zilog_start_tx()  local
587 	up->flags |= IP22ZILOG_FLAG_TX_ACTIVE;  in ip22zilog_start_tx()
588 	up->flags &= ~IP22ZILOG_FLAG_TX_STOPPED;  in ip22zilog_start_tx()
620 			uart_write_wakeup(&up->port);  in ip22zilog_start_tx()
627 	struct uart_ip22zilog_port *up = UART_ZILOG(port);  in ip22zilog_stop_rx()  local
630 	if (ZS_IS_CONS(up))  in ip22zilog_stop_rx()
636 	up->curregs[R1] &= ~RxINT_MASK;  in ip22zilog_stop_rx()
637 	ip22zilog_maybe_update_regs(up, channel);  in ip22zilog_stop_rx()
643 	struct uart_ip22zilog_port *up =  in ip22zilog_enable_ms()  local
648 	new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE);  in ip22zilog_enable_ms()
649 	if (new_reg != up->curregs[R15]) {  in ip22zilog_enable_ms()
650 		up->curregs[R15] = new_reg;  in ip22zilog_enable_ms()
653 		write_zsreg(channel, R15, up->curregs[R15]);  in ip22zilog_enable_ms()
660 	struct uart_ip22zilog_port *up =  in ip22zilog_break_ctl()  local
675 	new_reg = (up->curregs[R5] | set_bits) & ~clear_bits;  in ip22zilog_break_ctl()
676 	if (new_reg != up->curregs[R5]) {  in ip22zilog_break_ctl()
677 		up->curregs[R5] = new_reg;  in ip22zilog_break_ctl()
680 		write_zsreg(channel, R5, up->curregs[R5]);  in ip22zilog_break_ctl()
686 static void __ip22zilog_reset(struct uart_ip22zilog_port *up)  in __ip22zilog_reset()  argument
691 	if (up->flags & IP22ZILOG_FLAG_RESET_DONE)  in __ip22zilog_reset()
695 	channel = ZILOG_CHANNEL_FROM_PORT(&up->port);  in __ip22zilog_reset()
703 	if (!ZS_IS_CHANNEL_A(up)) {  in __ip22zilog_reset()
704 		up++;  in __ip22zilog_reset()
705 		channel = ZILOG_CHANNEL_FROM_PORT(&up->port);  in __ip22zilog_reset()
711 	up->flags |= IP22ZILOG_FLAG_RESET_DONE;  in __ip22zilog_reset()
712 	up->next->flags |= IP22ZILOG_FLAG_RESET_DONE;  in __ip22zilog_reset()
715 static void __ip22zilog_startup(struct uart_ip22zilog_port *up)  in __ip22zilog_startup()  argument
719 	channel = ZILOG_CHANNEL_FROM_PORT(&up->port);  in __ip22zilog_startup()
721 	__ip22zilog_reset(up);  in __ip22zilog_startup()
723 	__load_zsregs(channel, up->curregs);  in __ip22zilog_startup()
725 	write_zsreg(channel, R9, up->curregs[R9]);  in __ip22zilog_startup()
726 	up->prev_status = readb(&channel->control);  in __ip22zilog_startup()
729 	up->curregs[R3] |= RxENAB;  in __ip22zilog_startup()
730 	up->curregs[R5] |= TxENAB;  in __ip22zilog_startup()
732 	up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;  in __ip22zilog_startup()
733 	ip22zilog_maybe_update_regs(up, channel);  in __ip22zilog_startup()
738 	struct uart_ip22zilog_port *up = UART_ZILOG(port);  in ip22zilog_startup()  local
741 	if (ZS_IS_CONS(up))  in ip22zilog_startup()
745 	__ip22zilog_startup(up);  in ip22zilog_startup()
777 	struct uart_ip22zilog_port *up = UART_ZILOG(port);  in ip22zilog_shutdown()  local
781 	if (ZS_IS_CONS(up))  in ip22zilog_shutdown()
789 	up->curregs[R3] &= ~RxENAB;  in ip22zilog_shutdown()
790 	up->curregs[R5] &= ~TxENAB;  in ip22zilog_shutdown()
793 	up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);  in ip22zilog_shutdown()
794 	up->curregs[R5] &= ~SND_BRK;  in ip22zilog_shutdown()
795 	ip22zilog_maybe_update_regs(up, channel);  in ip22zilog_shutdown()
804 ip22zilog_convert_to_zs(struct uart_ip22zilog_port *up, unsigned int cflag,  in ip22zilog_convert_to_zs()  argument
808 	up->curregs[R10] = NRZ;  in ip22zilog_convert_to_zs()
809 	up->curregs[R11] = TCBR | RCBR;  in ip22zilog_convert_to_zs()
812 	up->curregs[R4] &= ~XCLK_MASK;  in ip22zilog_convert_to_zs()
813 	up->curregs[R4] |= X16CLK;  in ip22zilog_convert_to_zs()
814 	up->curregs[R12] = brg & 0xff;  in ip22zilog_convert_to_zs()
815 	up->curregs[R13] = (brg >> 8) & 0xff;  in ip22zilog_convert_to_zs()
816 	up->curregs[R14] = BRENAB;  in ip22zilog_convert_to_zs()
819 	up->curregs[3] &= ~RxN_MASK;  in ip22zilog_convert_to_zs()
820 	up->curregs[5] &= ~TxN_MASK;  in ip22zilog_convert_to_zs()
823 		up->curregs[3] |= Rx5;  in ip22zilog_convert_to_zs()
824 		up->curregs[5] |= Tx5;  in ip22zilog_convert_to_zs()
825 		up->parity_mask = 0x1f;  in ip22zilog_convert_to_zs()
828 		up->curregs[3] |= Rx6;  in ip22zilog_convert_to_zs()
829 		up->curregs[5] |= Tx6;  in ip22zilog_convert_to_zs()
830 		up->parity_mask = 0x3f;  in ip22zilog_convert_to_zs()
833 		up->curregs[3] |= Rx7;  in ip22zilog_convert_to_zs()
834 		up->curregs[5] |= Tx7;  in ip22zilog_convert_to_zs()
835 		up->parity_mask = 0x7f;  in ip22zilog_convert_to_zs()
839 		up->curregs[3] |= Rx8;  in ip22zilog_convert_to_zs()
840 		up->curregs[5] |= Tx8;  in ip22zilog_convert_to_zs()
841 		up->parity_mask = 0xff;  in ip22zilog_convert_to_zs()
844 	up->curregs[4] &= ~0x0c;  in ip22zilog_convert_to_zs()
846 		up->curregs[4] |= SB2;  in ip22zilog_convert_to_zs()
848 		up->curregs[4] |= SB1;  in ip22zilog_convert_to_zs()
850 		up->curregs[4] |= PAR_ENAB;  in ip22zilog_convert_to_zs()
852 		up->curregs[4] &= ~PAR_ENAB;  in ip22zilog_convert_to_zs()
854 		up->curregs[4] |= PAR_EVEN;  in ip22zilog_convert_to_zs()
856 		up->curregs[4] &= ~PAR_EVEN;  in ip22zilog_convert_to_zs()
858 	up->port.read_status_mask = Rx_OVR;  in ip22zilog_convert_to_zs()
860 		up->port.read_status_mask |= CRC_ERR | PAR_ERR;  in ip22zilog_convert_to_zs()
862 		up->port.read_status_mask |= BRK_ABRT;  in ip22zilog_convert_to_zs()
864 	up->port.ignore_status_mask = 0;  in ip22zilog_convert_to_zs()
866 		up->port.ignore_status_mask |= CRC_ERR | PAR_ERR;  in ip22zilog_convert_to_zs()
868 		up->port.ignore_status_mask |= BRK_ABRT;  in ip22zilog_convert_to_zs()
870 			up->port.ignore_status_mask |= Rx_OVR;  in ip22zilog_convert_to_zs()
874 		up->port.ignore_status_mask = 0xff;  in ip22zilog_convert_to_zs()
882 	struct uart_ip22zilog_port *up =  in ip22zilog_set_termios()  local
889 	spin_lock_irqsave(&up->port.lock, flags);  in ip22zilog_set_termios()
893 	ip22zilog_convert_to_zs(up, termios->c_cflag, termios->c_iflag, brg);  in ip22zilog_set_termios()
895 	if (UART_ENABLE_MS(&up->port, termios->c_cflag))  in ip22zilog_set_termios()
896 		up->flags |= IP22ZILOG_FLAG_MODEM_STATUS;  in ip22zilog_set_termios()
898 		up->flags &= ~IP22ZILOG_FLAG_MODEM_STATUS;  in ip22zilog_set_termios()
900 	ip22zilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port));  in ip22zilog_set_termios()
903 	spin_unlock_irqrestore(&up->port.lock, flags);  in ip22zilog_set_termios()
1022 	struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index];  in ip22zilog_console_write()  local
1025 	spin_lock_irqsave(&up->port.lock, flags);  in ip22zilog_console_write()
1026 	uart_console_write(&up->port, s, count, ip22zilog_put_char);  in ip22zilog_console_write()
1028 	spin_unlock_irqrestore(&up->port.lock, flags);  in ip22zilog_console_write()
1033 	struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index];  in ip22zilog_console_setup()  local
1039 	up->flags |= IP22ZILOG_FLAG_IS_CONS;  in ip22zilog_console_setup()
1043 	spin_lock_irqsave(&up->port.lock, flags);  in ip22zilog_console_setup()
1045 	up->curregs[R15] |= BRKIE;  in ip22zilog_console_setup()
1047 	__ip22zilog_startup(up);  in ip22zilog_console_setup()
1049 	spin_unlock_irqrestore(&up->port.lock, flags);  in ip22zilog_console_setup()
1053 	return uart_set_options(&up->port, con, baud, parity, bits, flow);  in ip22zilog_console_setup()
1083 	struct uart_ip22zilog_port *up;  in ip22zilog_prepare()  local
1094         up = &ip22zilog_port_table[0];  in ip22zilog_prepare()
1096 		up[channel].next = &up[channel - 1];  in ip22zilog_prepare()
1097 	up[channel].next = NULL;  in ip22zilog_prepare()
1103 			up[(chip * 2) + 0].port.membase = (char *) &rp->channelB;  in ip22zilog_prepare()
1104 			up[(chip * 2) + 1].port.membase = (char *) &rp->channelA;  in ip22zilog_prepare()
1107 			up[(chip * 2) + 0].port.mapbase =  in ip22zilog_prepare()
1109 			up[(chip * 2) + 1].port.mapbase =  in ip22zilog_prepare()
1114 		up[(chip * 2) + 0].port.iotype = UPIO_MEM;  in ip22zilog_prepare()
1115 		up[(chip * 2) + 0].port.irq = zilog_irq;  in ip22zilog_prepare()
1116 		up[(chip * 2) + 0].port.uartclk = ZS_CLOCK;  in ip22zilog_prepare()
1117 		up[(chip * 2) + 0].port.fifosize = 1;  in ip22zilog_prepare()
1118 		up[(chip * 2) + 0].port.ops = &ip22zilog_pops;  in ip22zilog_prepare()
1119 		up[(chip * 2) + 0].port.type = PORT_IP22ZILOG;  in ip22zilog_prepare()
1120 		up[(chip * 2) + 0].port.flags = 0;  in ip22zilog_prepare()
1121 		up[(chip * 2) + 0].port.line = (chip * 2) + 0;  in ip22zilog_prepare()
1122 		up[(chip * 2) + 0].flags = 0;  in ip22zilog_prepare()
1125 		up[(chip * 2) + 1].port.iotype = UPIO_MEM;  in ip22zilog_prepare()
1126 		up[(chip * 2) + 1].port.irq = zilog_irq;  in ip22zilog_prepare()
1127 		up[(chip * 2) + 1].port.uartclk = ZS_CLOCK;  in ip22zilog_prepare()
1128 		up[(chip * 2) + 1].port.fifosize = 1;  in ip22zilog_prepare()
1129 		up[(chip * 2) + 1].port.ops = &ip22zilog_pops;  in ip22zilog_prepare()
1130 		up[(chip * 2) + 1].port.type = PORT_IP22ZILOG;  in ip22zilog_prepare()
1131 		up[(chip * 2) + 1].port.line = (chip * 2) + 1;  in ip22zilog_prepare()
1132 		up[(chip * 2) + 1].flags |= IP22ZILOG_FLAG_IS_CHANNEL_A;  in ip22zilog_prepare()
1136 		struct uart_ip22zilog_port *up = &ip22zilog_port_table[channel];  in ip22zilog_prepare()  local
1140 		up->parity_mask = 0xff;  in ip22zilog_prepare()
1141 		up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;  in ip22zilog_prepare()
1142 		up->curregs[R4] = PAR_EVEN | X16CLK | SB1;  in ip22zilog_prepare()
1143 		up->curregs[R3] = RxENAB | Rx8;  in ip22zilog_prepare()
1144 		up->curregs[R5] = TxENAB | Tx8;  in ip22zilog_prepare()
1145 		up->curregs[R9] = NV | MIE;  in ip22zilog_prepare()
1146 		up->curregs[R10] = NRZ;  in ip22zilog_prepare()
1147 		up->curregs[R11] = TCBR | RCBR;  in ip22zilog_prepare()
1149 		up->curregs[R12] = (brg & 0xff);  in ip22zilog_prepare()
1150 		up->curregs[R13] = (brg >> 8) & 0xff;  in ip22zilog_prepare()
1151 		up->curregs[R14] = BRENAB;  in ip22zilog_prepare()
1173 			struct uart_ip22zilog_port *up = &ip22zilog_port_table[i];  in ip22zilog_ports_init()  local
1175 			uart_add_one_port(&ip22zilog_reg, &up->port);  in ip22zilog_ports_init()
1194 	struct uart_ip22zilog_port *up;  in ip22zilog_exit()  local
1197 		up = &ip22zilog_port_table[i];  in ip22zilog_exit()
1199 		uart_remove_one_port(&ip22zilog_reg, &up->port);  in ip22zilog_exit()
1203 	up = &ip22zilog_port_table[0];  in ip22zilog_exit()
1205 		if (up[(i * 2) + 0].port.mapbase) {  in ip22zilog_exit()
1206 		   iounmap((void*)up[(i * 2) + 0].port.mapbase);  in ip22zilog_exit()
1207 		   up[(i * 2) + 0].port.mapbase = 0;  in ip22zilog_exit()
1209 		if (up[(i * 2) + 1].port.mapbase) {  in ip22zilog_exit()
1210 			iounmap((void*)up[(i * 2) + 1].port.mapbase);  in ip22zilog_exit()
1211 			up[(i * 2) + 1].port.mapbase = 0;  in ip22zilog_exit()