Lines Matching refs:REG_SET_MASK
199 #define REG_SET_MASK(r, m, v) (((r) & ~(m)) | \ macro
487 r = REG_SET_MASK(r, sg->thermtrip_threshold_mask, temp); in thermtrip_program()
488 r = REG_SET_MASK(r, sg->thermtrip_enable_mask, 1); in thermtrip_program()
489 r = REG_SET_MASK(r, sg->thermtrip_any_en_mask, 0); in thermtrip_program()
544 r = REG_SET_MASK(r, sg->thermctl_lvl0_up_thresh_mask, temp); in throttrip_program()
545 r = REG_SET_MASK(r, sg->thermctl_lvl0_dn_thresh_mask, temp); in throttrip_program()
546 r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_CPU_THROT_MASK, cpu_throt); in throttrip_program()
547 r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_GPU_THROT_MASK, gpu_throt); in throttrip_program()
548 r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_EN_MASK, 1); in throttrip_program()
673 r = REG_SET_MASK(r, zn->sg->thermctl_isr_mask, TH_INTR_UP_DN_EN); in thermal_irq_enable()
685 r = REG_SET_MASK(r, zn->sg->thermctl_isr_mask, 0); in thermal_irq_disable()
698 r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_EN_MASK, 0); in tegra_thermctl_set_trips()
705 r = REG_SET_MASK(r, zone->sg->thermctl_lvl0_up_thresh_mask, hi); in tegra_thermctl_set_trips()
706 r = REG_SET_MASK(r, zone->sg->thermctl_lvl0_dn_thresh_mask, lo); in tegra_thermctl_set_trips()
707 r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_EN_MASK, 1); in tegra_thermctl_set_trips()
953 r = REG_SET_MASK(r, OC_INTR_OC1_MASK, 1); in soctherm_oc_intr_enable()
956 r = REG_SET_MASK(r, OC_INTR_OC2_MASK, 1); in soctherm_oc_intr_enable()
959 r = REG_SET_MASK(r, OC_INTR_OC3_MASK, 1); in soctherm_oc_intr_enable()
962 r = REG_SET_MASK(r, OC_INTR_OC4_MASK, 1); in soctherm_oc_intr_enable()
1788 r = REG_SET_MASK(r, CCROC_THROT_PSKIP_RAMP_DURATION_MASK, 0xff); in throttlectl_cpu_level_cfg()
1789 r = REG_SET_MASK(r, CCROC_THROT_PSKIP_RAMP_STEP_MASK, 0xf); in throttlectl_cpu_level_cfg()
1793 r = REG_SET_MASK(r, CCROC_THROT_PSKIP_CTRL_ENB_MASK, 1); in throttlectl_cpu_level_cfg()
1794 r = REG_SET_MASK(r, CCROC_THROT_PSKIP_CTRL_DIVIDEND_MASK, dividend); in throttlectl_cpu_level_cfg()
1795 r = REG_SET_MASK(r, CCROC_THROT_PSKIP_CTRL_DIVISOR_MASK, 0xff); in throttlectl_cpu_level_cfg()
1832 r = REG_SET_MASK(r, THROT_PSKIP_CTRL_ENABLE_MASK, 1); in throttlectl_cpu_level_select()
1833 r = REG_SET_MASK(r, THROT_PSKIP_CTRL_VECT_CPU_MASK, throt_vect); in throttlectl_cpu_level_select()
1834 r = REG_SET_MASK(r, THROT_PSKIP_CTRL_VECT2_CPU_MASK, throt_vect); in throttlectl_cpu_level_select()
1838 r = REG_SET_MASK(0, THROT_PSKIP_RAMP_SEQ_BYPASS_MODE_MASK, 1); in throttlectl_cpu_level_select()
1864 r = REG_SET_MASK(r, THROT_PSKIP_CTRL_ENABLE_MASK, 1); in throttlectl_cpu_mn()
1865 r = REG_SET_MASK(r, THROT_PSKIP_CTRL_DIVIDEND_MASK, dividend); in throttlectl_cpu_mn()
1866 r = REG_SET_MASK(r, THROT_PSKIP_CTRL_DIVISOR_MASK, 0xff); in throttlectl_cpu_mn()
1870 r = REG_SET_MASK(r, THROT_PSKIP_RAMP_DURATION_MASK, 0xff); in throttlectl_cpu_mn()
1871 r = REG_SET_MASK(r, THROT_PSKIP_RAMP_STEP_MASK, 0xf); in throttlectl_cpu_mn()
1892 r = REG_SET_MASK(r, THROT_PSKIP_CTRL_ENABLE_MASK, 1); in throttlectl_gpu_level_select()
1893 r = REG_SET_MASK(r, THROT_PSKIP_CTRL_VECT_GPU_MASK, throt_vect); in throttlectl_gpu_level_select()
1906 r = REG_SET_MASK(0, OC1_CFG_HW_RESTORE_MASK, 1); in soctherm_oc_cfg_program()
1907 r = REG_SET_MASK(r, OC1_CFG_THROTTLE_MODE_MASK, oc->mode); in soctherm_oc_cfg_program()
1908 r = REG_SET_MASK(r, OC1_CFG_ALARM_POLARITY_MASK, oc->active_low); in soctherm_oc_cfg_program()
1909 r = REG_SET_MASK(r, OC1_CFG_EN_THROTTLE_MASK, 1); in soctherm_oc_cfg_program()
1946 r = REG_SET_MASK(0, THROT_PRIORITY_LITE_PRIO_MASK, stc.priority); in soctherm_throttle_program()
1949 r = REG_SET_MASK(0, THROT_DELAY_LITE_DELAY_MASK, 0); in soctherm_throttle_program()
1956 r = REG_SET_MASK(0, THROT_PRIORITY_LOCK_PRIORITY_MASK, in soctherm_throttle_program()
1978 v = REG_SET_MASK(0, THROT_GLOBAL_ENB_MASK, 1); in tegra_soctherm_throttle()
1983 v = REG_SET_MASK(v, CDIVG_USE_THERM_CONTROLS_MASK, 1); in tegra_soctherm_throttle()
1989 v = REG_SET_MASK(v, CDIVG_USE_THERM_CONTROLS_MASK, 1); in tegra_soctherm_throttle()
2065 pdiv = REG_SET_MASK(pdiv, ttgs[i]->pdiv_mask, in soctherm_init()
2070 hotspot = REG_SET_MASK(hotspot, in soctherm_init()