Lines Matching +full:spi +full:- +full:lsb +full:- +full:first
1 // SPDX-License-Identifier: GPL-2.0
3 * SuperH MSIOF SPI Controller Interface
7 * Copyright (C) 2014-2017 Glider bvba
14 #include <linux/dma-mapping.h>
30 #include <linux/spi/sh_msiof.h>
31 #include <linux/spi/spi.h>
88 #define MDR1_SYNCMD_SPI (2 << 28)/* Level mode/SPI */
90 #define MDR1_SYNCAC_SHIFT 25 /* Sync Polarity (1 = Active-low) */
91 #define MDR1_BITLSB_SHIFT 24 /* MSB/LSB First (1 = LSB first) */
94 #define MDR1_FLD_MASK GENMASK(3, 2) /* Frame Sync Signal Interval (0-3) */
103 #define MDR2_BITLEN1(i) (((i) - 1) << 24) /* Data Size (8-32 bits) */
104 #define MDR2_WDLEN1(i) (((i) - 1) << 16) /* Word Count (1-64/256 (SH, A1))) */
108 #define SCR_BRPS_MASK GENMASK(12, 8) /* Prescaler Setting (1-32) */
109 #define SCR_BRPS(i) (((i) - 1) << 8)
130 #define CTR_TXDIZ_HIZ (2 << 22) /* High-impedance */
200 return ioread16(p->mapbase + reg_offs); in sh_msiof_read()
202 return ioread32(p->mapbase + reg_offs); in sh_msiof_read()
212 iowrite16(value, p->mapbase + reg_offs); in sh_msiof_write()
215 iowrite32(value, p->mapbase + reg_offs); in sh_msiof_write()
231 return readl_poll_timeout_atomic(p->mapbase + CTR, data, in sh_msiof_modify_ctr_wait()
241 complete(&p->done); in sh_msiof_spi_irq()
255 readl_poll_timeout_atomic(p->mapbase + CTR, data, !(data & mask), 1, in sh_msiof_spi_reset_regs()
269 unsigned int div_pow = p->min_div_pow; in sh_msiof_spi_set_clk_regs()
292 dev_err(&p->pdev->dev, in sh_msiof_spi_set_clk_regs()
293 "Requested SPI transfer rate %d is too low\n", spi_hz); in sh_msiof_spi_set_clk_regs()
300 if (!(p->ctlr->flags & SPI_CONTROLLER_MUST_TX)) in sh_msiof_spi_set_clk_regs()
307 * DTDL/SYNCDL bit : p->info->dtdl or p->info->syncdl in sh_msiof_get_delay_bit()
325 if (!p->info) in sh_msiof_spi_get_dtdl_and_syncdl()
329 if (p->info->dtdl > 200 || p->info->syncdl > 300) { in sh_msiof_spi_get_dtdl_and_syncdl()
330 dev_warn(&p->pdev->dev, "DTDL or SYNCDL is too large\n"); in sh_msiof_spi_get_dtdl_and_syncdl()
335 if ((p->info->dtdl + p->info->syncdl) % 100) { in sh_msiof_spi_get_dtdl_and_syncdl()
336 dev_warn(&p->pdev->dev, "the sum of DTDL/SYNCDL is not good\n"); in sh_msiof_spi_get_dtdl_and_syncdl()
340 val = sh_msiof_get_delay_bit(p->info->dtdl) << MDR1_DTDL_SHIFT; in sh_msiof_spi_get_dtdl_and_syncdl()
341 val |= sh_msiof_get_delay_bit(p->info->syncdl) << MDR1_SYNCDL_SHIFT; in sh_msiof_spi_get_dtdl_and_syncdl()
364 if (spi_controller_is_slave(p->ctlr)) { in sh_msiof_spi_set_pin_regs()
371 if (p->ctlr->flags & SPI_CONTROLLER_MUST_TX) { in sh_msiof_spi_set_pin_regs()
395 if (tx_buf || (p->ctlr->flags & SPI_CONTROLLER_MUST_TX)) in sh_msiof_spi_set_mode_regs()
550 static int sh_msiof_spi_setup(struct spi_device *spi) in sh_msiof_spi_setup() argument
553 spi_controller_get_devdata(spi->controller); in sh_msiof_spi_setup()
556 if (spi->cs_gpiod || spi_controller_is_slave(p->ctlr)) in sh_msiof_spi_setup()
559 if (p->native_cs_inited && in sh_msiof_spi_setup()
560 (p->native_cs_high == !!(spi->mode & SPI_CS_HIGH))) in sh_msiof_spi_setup()
566 if (spi->mode & SPI_CS_HIGH) in sh_msiof_spi_setup()
570 pm_runtime_get_sync(&p->pdev->dev); in sh_msiof_spi_setup()
575 pm_runtime_put(&p->pdev->dev); in sh_msiof_spi_setup()
576 p->native_cs_high = spi->mode & SPI_CS_HIGH; in sh_msiof_spi_setup()
577 p->native_cs_inited = true; in sh_msiof_spi_setup()
585 const struct spi_device *spi = msg->spi; in sh_msiof_prepare_message() local
589 if (spi->cs_gpiod) { in sh_msiof_prepare_message()
590 ss = p->unused_ss; in sh_msiof_prepare_message()
591 cs_high = p->native_cs_high; in sh_msiof_prepare_message()
593 ss = spi->chip_select; in sh_msiof_prepare_message()
594 cs_high = !!(spi->mode & SPI_CS_HIGH); in sh_msiof_prepare_message()
596 sh_msiof_spi_set_pin_regs(p, ss, !!(spi->mode & SPI_CPOL), in sh_msiof_prepare_message()
597 !!(spi->mode & SPI_CPHA), in sh_msiof_prepare_message()
598 !!(spi->mode & SPI_3WIRE), in sh_msiof_prepare_message()
599 !!(spi->mode & SPI_LSB_FIRST), cs_high); in sh_msiof_prepare_message()
605 bool slave = spi_controller_is_slave(p->ctlr); in sh_msiof_spi_start()
625 bool slave = spi_controller_is_slave(p->ctlr); in sh_msiof_spi_stop()
645 p->slave_aborted = true; in sh_msiof_slave_abort()
646 complete(&p->done); in sh_msiof_slave_abort()
647 complete(&p->done_txdma); in sh_msiof_slave_abort()
654 if (spi_controller_is_slave(p->ctlr)) { in sh_msiof_wait_for_completion()
656 p->slave_aborted) { in sh_msiof_wait_for_completion()
657 dev_dbg(&p->pdev->dev, "interrupted\n"); in sh_msiof_wait_for_completion()
658 return -EINTR; in sh_msiof_wait_for_completion()
662 dev_err(&p->pdev->dev, "timeout\n"); in sh_msiof_wait_for_completion()
663 return -ETIMEDOUT; in sh_msiof_wait_for_completion()
683 words = min_t(int, words, p->tx_fifo_size); in sh_msiof_spi_txrx_once()
685 words = min_t(int, words, p->rx_fifo_size); in sh_msiof_spi_txrx_once()
688 fifo_shift = 32 - bits; in sh_msiof_spi_txrx_once()
701 reinit_completion(&p->done); in sh_msiof_spi_txrx_once()
702 p->slave_aborted = false; in sh_msiof_spi_txrx_once()
706 dev_err(&p->pdev->dev, "failed to start hardware\n"); in sh_msiof_spi_txrx_once()
711 ret = sh_msiof_wait_for_completion(p, &p->done); in sh_msiof_spi_txrx_once()
724 dev_err(&p->pdev->dev, "failed to shut down hardware\n"); in sh_msiof_spi_txrx_once()
751 /* First prepare and submit the DMA request(s), as this may fail */ in sh_msiof_dma_once()
754 desc_rx = dmaengine_prep_slave_single(p->ctlr->dma_rx, in sh_msiof_dma_once()
755 p->rx_dma_addr, len, DMA_DEV_TO_MEM, in sh_msiof_dma_once()
758 return -EAGAIN; in sh_msiof_dma_once()
760 desc_rx->callback = sh_msiof_dma_complete; in sh_msiof_dma_once()
761 desc_rx->callback_param = &p->done; in sh_msiof_dma_once()
769 dma_sync_single_for_device(p->ctlr->dma_tx->device->dev, in sh_msiof_dma_once()
770 p->tx_dma_addr, len, DMA_TO_DEVICE); in sh_msiof_dma_once()
771 desc_tx = dmaengine_prep_slave_single(p->ctlr->dma_tx, in sh_msiof_dma_once()
772 p->tx_dma_addr, len, DMA_MEM_TO_DEV, in sh_msiof_dma_once()
775 ret = -EAGAIN; in sh_msiof_dma_once()
779 desc_tx->callback = sh_msiof_dma_complete; in sh_msiof_dma_once()
780 desc_tx->callback_param = &p->done_txdma; in sh_msiof_dma_once()
791 /* setup msiof transfer mode registers (32-bit words) */ in sh_msiof_dma_once()
796 reinit_completion(&p->done); in sh_msiof_dma_once()
798 reinit_completion(&p->done_txdma); in sh_msiof_dma_once()
799 p->slave_aborted = false; in sh_msiof_dma_once()
803 dma_async_issue_pending(p->ctlr->dma_rx); in sh_msiof_dma_once()
805 dma_async_issue_pending(p->ctlr->dma_tx); in sh_msiof_dma_once()
809 dev_err(&p->pdev->dev, "failed to start hardware\n"); in sh_msiof_dma_once()
815 ret = sh_msiof_wait_for_completion(p, &p->done_txdma); in sh_msiof_dma_once()
822 ret = sh_msiof_wait_for_completion(p, &p->done); in sh_msiof_dma_once()
830 ret = sh_msiof_wait_for_completion(p, &p->done); in sh_msiof_dma_once()
840 dev_err(&p->pdev->dev, "failed to shut down hardware\n"); in sh_msiof_dma_once()
845 dma_sync_single_for_cpu(p->ctlr->dma_rx->device->dev, in sh_msiof_dma_once()
846 p->rx_dma_addr, len, DMA_FROM_DEVICE); in sh_msiof_dma_once()
855 dmaengine_terminate_all(p->ctlr->dma_tx); in sh_msiof_dma_once()
858 dmaengine_terminate_all(p->ctlr->dma_rx); in sh_msiof_dma_once()
867 while (words--) { in copy_bswap32()
872 while (words--) { in copy_bswap32()
877 while (words--) in copy_bswap32()
886 while (words--) { in copy_wswap32()
891 while (words--) { in copy_wswap32()
896 while (words--) in copy_wswap32()
907 struct spi_device *spi, in sh_msiof_transfer_one() argument
914 const void *tx_buf = t->tx_buf; in sh_msiof_transfer_one()
915 void *rx_buf = t->rx_buf; in sh_msiof_transfer_one()
916 unsigned int len = t->len; in sh_msiof_transfer_one()
917 unsigned int bits = t->bits_per_word; in sh_msiof_transfer_one()
928 if (!spi_controller_is_slave(p->ctlr)) in sh_msiof_transfer_one()
929 sh_msiof_spi_set_clk_regs(p, clk_get_rate(p->clk), t->speed_hz); in sh_msiof_transfer_one()
931 while (ctlr->dma_tx && len > 15) { in sh_msiof_transfer_one()
933 * DMA supports 32-bit words only, hence pack 8-bit and 16-bit in sh_msiof_transfer_one()
939 l = min(round_down(len, 4), p->tx_fifo_size * 4); in sh_msiof_transfer_one()
941 l = min(round_down(len, 4), p->rx_fifo_size * 4); in sh_msiof_transfer_one()
952 copy32(p->tx_dma_page, tx_buf, l / 4); in sh_msiof_transfer_one()
955 if (ret == -EAGAIN) { in sh_msiof_transfer_one()
956 dev_warn_once(&p->pdev->dev, in sh_msiof_transfer_one()
964 copy32(rx_buf, p->rx_dma_page, l / 4); in sh_msiof_transfer_one()
970 len -= l; in sh_msiof_transfer_one()
1035 words -= n; in sh_msiof_transfer_one()
1039 bits = t->bits_per_word; in sh_msiof_transfer_one()
1076 { .compatible = "renesas,sh-mobile-msiof", .data = &sh_data },
1077 { .compatible = "renesas,msiof-r8a7743", .data = &rcar_gen2_data },
1078 { .compatible = "renesas,msiof-r8a7745", .data = &rcar_gen2_data },
1079 { .compatible = "renesas,msiof-r8a7790", .data = &rcar_gen2_data },
1080 { .compatible = "renesas,msiof-r8a7791", .data = &rcar_gen2_data },
1081 { .compatible = "renesas,msiof-r8a7792", .data = &rcar_gen2_data },
1082 { .compatible = "renesas,msiof-r8a7793", .data = &rcar_gen2_data },
1083 { .compatible = "renesas,msiof-r8a7794", .data = &rcar_gen2_data },
1084 { .compatible = "renesas,rcar-gen2-msiof", .data = &rcar_gen2_data },
1085 { .compatible = "renesas,msiof-r8a7796", .data = &rcar_gen3_data },
1086 { .compatible = "renesas,rcar-gen3-msiof", .data = &rcar_gen3_data },
1087 { .compatible = "renesas,sh-msiof", .data = &sh_data }, /* Deprecated */
1096 struct device_node *np = dev->of_node; in sh_msiof_spi_parse_dt()
1103 info->mode = of_property_read_bool(np, "spi-slave") ? MSIOF_SPI_SLAVE in sh_msiof_spi_parse_dt()
1107 if (info->mode == MSIOF_SPI_MASTER) in sh_msiof_spi_parse_dt()
1108 of_property_read_u32(np, "num-cs", &num_cs); in sh_msiof_spi_parse_dt()
1109 of_property_read_u32(np, "renesas,tx-fifo-size", in sh_msiof_spi_parse_dt()
1110 &info->tx_fifo_override); in sh_msiof_spi_parse_dt()
1111 of_property_read_u32(np, "renesas,rx-fifo-size", in sh_msiof_spi_parse_dt()
1112 &info->rx_fifo_override); in sh_msiof_spi_parse_dt()
1113 of_property_read_u32(np, "renesas,dtdl", &info->dtdl); in sh_msiof_spi_parse_dt()
1114 of_property_read_u32(np, "renesas,syncdl", &info->syncdl); in sh_msiof_spi_parse_dt()
1116 info->num_chipselect = num_cs; in sh_msiof_spi_parse_dt()
1129 struct device *dev = &p->pdev->dev; in sh_msiof_get_cs_gpios()
1139 num_cs = max_t(unsigned int, ret, p->ctlr->num_chipselect); in sh_msiof_get_cs_gpios()
1150 if (PTR_ERR(gpiod) != -ENOENT) in sh_msiof_get_cs_gpios()
1155 return -EINVAL; in sh_msiof_get_cs_gpios()
1159 p->unused_ss = ffz(used_ss_mask); in sh_msiof_get_cs_gpios()
1160 if (cs_gpios && p->unused_ss >= MAX_SS) { in sh_msiof_get_cs_gpios()
1162 return -EINVAL; in sh_msiof_get_cs_gpios()
1208 struct platform_device *pdev = p->pdev; in sh_msiof_request_dma()
1209 struct device *dev = &pdev->dev; in sh_msiof_request_dma()
1210 const struct sh_msiof_spi_info *info = p->info; in sh_msiof_request_dma()
1216 if (dev->of_node) { in sh_msiof_request_dma()
1220 } else if (info && info->dma_tx_id && info->dma_rx_id) { in sh_msiof_request_dma()
1221 dma_tx_id = info->dma_tx_id; in sh_msiof_request_dma()
1222 dma_rx_id = info->dma_rx_id; in sh_msiof_request_dma()
1233 ctlr = p->ctlr; in sh_msiof_request_dma()
1234 ctlr->dma_tx = sh_msiof_request_dma_chan(dev, DMA_MEM_TO_DEV, in sh_msiof_request_dma()
1235 dma_tx_id, res->start + TFDR); in sh_msiof_request_dma()
1236 if (!ctlr->dma_tx) in sh_msiof_request_dma()
1237 return -ENODEV; in sh_msiof_request_dma()
1239 ctlr->dma_rx = sh_msiof_request_dma_chan(dev, DMA_DEV_TO_MEM, in sh_msiof_request_dma()
1240 dma_rx_id, res->start + RFDR); in sh_msiof_request_dma()
1241 if (!ctlr->dma_rx) in sh_msiof_request_dma()
1244 p->tx_dma_page = (void *)__get_free_page(GFP_KERNEL | GFP_DMA); in sh_msiof_request_dma()
1245 if (!p->tx_dma_page) in sh_msiof_request_dma()
1248 p->rx_dma_page = (void *)__get_free_page(GFP_KERNEL | GFP_DMA); in sh_msiof_request_dma()
1249 if (!p->rx_dma_page) in sh_msiof_request_dma()
1252 tx_dev = ctlr->dma_tx->device->dev; in sh_msiof_request_dma()
1253 p->tx_dma_addr = dma_map_single(tx_dev, p->tx_dma_page, PAGE_SIZE, in sh_msiof_request_dma()
1255 if (dma_mapping_error(tx_dev, p->tx_dma_addr)) in sh_msiof_request_dma()
1258 rx_dev = ctlr->dma_rx->device->dev; in sh_msiof_request_dma()
1259 p->rx_dma_addr = dma_map_single(rx_dev, p->rx_dma_page, PAGE_SIZE, in sh_msiof_request_dma()
1261 if (dma_mapping_error(rx_dev, p->rx_dma_addr)) in sh_msiof_request_dma()
1268 dma_unmap_single(tx_dev, p->tx_dma_addr, PAGE_SIZE, DMA_TO_DEVICE); in sh_msiof_request_dma()
1270 free_page((unsigned long)p->rx_dma_page); in sh_msiof_request_dma()
1272 free_page((unsigned long)p->tx_dma_page); in sh_msiof_request_dma()
1274 dma_release_channel(ctlr->dma_rx); in sh_msiof_request_dma()
1276 dma_release_channel(ctlr->dma_tx); in sh_msiof_request_dma()
1277 ctlr->dma_tx = NULL; in sh_msiof_request_dma()
1278 return -ENODEV; in sh_msiof_request_dma()
1283 struct spi_controller *ctlr = p->ctlr; in sh_msiof_release_dma()
1285 if (!ctlr->dma_tx) in sh_msiof_release_dma()
1288 dma_unmap_single(ctlr->dma_rx->device->dev, p->rx_dma_addr, PAGE_SIZE, in sh_msiof_release_dma()
1290 dma_unmap_single(ctlr->dma_tx->device->dev, p->tx_dma_addr, PAGE_SIZE, in sh_msiof_release_dma()
1292 free_page((unsigned long)p->rx_dma_page); in sh_msiof_release_dma()
1293 free_page((unsigned long)p->tx_dma_page); in sh_msiof_release_dma()
1294 dma_release_channel(ctlr->dma_rx); in sh_msiof_release_dma()
1295 dma_release_channel(ctlr->dma_tx); in sh_msiof_release_dma()
1307 chipdata = of_device_get_match_data(&pdev->dev); in sh_msiof_spi_probe()
1309 info = sh_msiof_spi_parse_dt(&pdev->dev); in sh_msiof_spi_probe()
1311 chipdata = (const void *)pdev->id_entry->driver_data; in sh_msiof_spi_probe()
1312 info = dev_get_platdata(&pdev->dev); in sh_msiof_spi_probe()
1316 dev_err(&pdev->dev, "failed to obtain device info\n"); in sh_msiof_spi_probe()
1317 return -ENXIO; in sh_msiof_spi_probe()
1320 if (info->mode == MSIOF_SPI_SLAVE) in sh_msiof_spi_probe()
1321 ctlr = spi_alloc_slave(&pdev->dev, in sh_msiof_spi_probe()
1324 ctlr = spi_alloc_master(&pdev->dev, in sh_msiof_spi_probe()
1327 return -ENOMEM; in sh_msiof_spi_probe()
1332 p->ctlr = ctlr; in sh_msiof_spi_probe()
1333 p->info = info; in sh_msiof_spi_probe()
1334 p->min_div_pow = chipdata->min_div_pow; in sh_msiof_spi_probe()
1336 init_completion(&p->done); in sh_msiof_spi_probe()
1337 init_completion(&p->done_txdma); in sh_msiof_spi_probe()
1339 p->clk = devm_clk_get(&pdev->dev, NULL); in sh_msiof_spi_probe()
1340 if (IS_ERR(p->clk)) { in sh_msiof_spi_probe()
1341 dev_err(&pdev->dev, "cannot get clock\n"); in sh_msiof_spi_probe()
1342 ret = PTR_ERR(p->clk); in sh_msiof_spi_probe()
1352 p->mapbase = devm_platform_ioremap_resource(pdev, 0); in sh_msiof_spi_probe()
1353 if (IS_ERR(p->mapbase)) { in sh_msiof_spi_probe()
1354 ret = PTR_ERR(p->mapbase); in sh_msiof_spi_probe()
1358 ret = devm_request_irq(&pdev->dev, i, sh_msiof_spi_irq, 0, in sh_msiof_spi_probe()
1359 dev_name(&pdev->dev), p); in sh_msiof_spi_probe()
1361 dev_err(&pdev->dev, "unable to request irq\n"); in sh_msiof_spi_probe()
1365 p->pdev = pdev; in sh_msiof_spi_probe()
1366 pm_runtime_enable(&pdev->dev); in sh_msiof_spi_probe()
1369 p->tx_fifo_size = chipdata->tx_fifo_size; in sh_msiof_spi_probe()
1370 p->rx_fifo_size = chipdata->rx_fifo_size; in sh_msiof_spi_probe()
1371 if (p->info->tx_fifo_override) in sh_msiof_spi_probe()
1372 p->tx_fifo_size = p->info->tx_fifo_override; in sh_msiof_spi_probe()
1373 if (p->info->rx_fifo_override) in sh_msiof_spi_probe()
1374 p->rx_fifo_size = p->info->rx_fifo_override; in sh_msiof_spi_probe()
1377 ctlr->num_chipselect = p->info->num_chipselect; in sh_msiof_spi_probe()
1383 ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; in sh_msiof_spi_probe()
1384 ctlr->mode_bits |= SPI_LSB_FIRST | SPI_3WIRE; in sh_msiof_spi_probe()
1385 ctlr->flags = chipdata->ctlr_flags; in sh_msiof_spi_probe()
1386 ctlr->bus_num = pdev->id; in sh_msiof_spi_probe()
1387 ctlr->dev.of_node = pdev->dev.of_node; in sh_msiof_spi_probe()
1388 ctlr->setup = sh_msiof_spi_setup; in sh_msiof_spi_probe()
1389 ctlr->prepare_message = sh_msiof_prepare_message; in sh_msiof_spi_probe()
1390 ctlr->slave_abort = sh_msiof_slave_abort; in sh_msiof_spi_probe()
1391 ctlr->bits_per_word_mask = chipdata->bits_per_word_mask; in sh_msiof_spi_probe()
1392 ctlr->auto_runtime_pm = true; in sh_msiof_spi_probe()
1393 ctlr->transfer_one = sh_msiof_transfer_one; in sh_msiof_spi_probe()
1394 ctlr->use_gpio_descriptors = true; in sh_msiof_spi_probe()
1398 dev_warn(&pdev->dev, "DMA not available, using PIO\n"); in sh_msiof_spi_probe()
1400 ret = devm_spi_register_controller(&pdev->dev, ctlr); in sh_msiof_spi_probe()
1402 dev_err(&pdev->dev, "devm_spi_register_controller error.\n"); in sh_msiof_spi_probe()
1410 pm_runtime_disable(&pdev->dev); in sh_msiof_spi_probe()
1421 pm_runtime_disable(&pdev->dev); in sh_msiof_spi_remove()
1436 return spi_controller_suspend(p->ctlr); in sh_msiof_spi_suspend()
1443 return spi_controller_resume(p->ctlr); in sh_msiof_spi_resume()
1465 MODULE_DESCRIPTION("SuperH MSIOF SPI Controller Interface Driver");