Lines Matching refs:ctrl

146 static u32 qspi_buswidth_to_iomode(struct qcom_qspi *ctrl,  in qspi_buswidth_to_iomode()  argument
157 dev_warn_once(ctrl->dev, in qspi_buswidth_to_iomode()
163 static void qcom_qspi_pio_xfer_cfg(struct qcom_qspi *ctrl) in qcom_qspi_pio_xfer_cfg() argument
168 xfer = &ctrl->xfer; in qcom_qspi_pio_xfer_cfg()
169 pio_xfer_cfg = readl(ctrl->base + PIO_XFER_CFG); in qcom_qspi_pio_xfer_cfg()
177 pio_xfer_cfg |= qspi_buswidth_to_iomode(ctrl, xfer->buswidth); in qcom_qspi_pio_xfer_cfg()
179 writel(pio_xfer_cfg, ctrl->base + PIO_XFER_CFG); in qcom_qspi_pio_xfer_cfg()
182 static void qcom_qspi_pio_xfer_ctrl(struct qcom_qspi *ctrl) in qcom_qspi_pio_xfer_ctrl() argument
186 pio_xfer_ctrl = readl(ctrl->base + PIO_XFER_CTRL); in qcom_qspi_pio_xfer_ctrl()
188 pio_xfer_ctrl |= ctrl->xfer.rem_bytes; in qcom_qspi_pio_xfer_ctrl()
189 writel(pio_xfer_ctrl, ctrl->base + PIO_XFER_CTRL); in qcom_qspi_pio_xfer_ctrl()
192 static void qcom_qspi_pio_xfer(struct qcom_qspi *ctrl) in qcom_qspi_pio_xfer() argument
196 qcom_qspi_pio_xfer_cfg(ctrl); in qcom_qspi_pio_xfer()
199 writel(QSPI_ALL_IRQS, ctrl->base + MSTR_INT_STATUS); in qcom_qspi_pio_xfer()
202 if (ctrl->xfer.dir == QSPI_WRITE) in qcom_qspi_pio_xfer()
206 writel(ints, ctrl->base + MSTR_INT_EN); in qcom_qspi_pio_xfer()
209 qcom_qspi_pio_xfer_ctrl(ctrl); in qcom_qspi_pio_xfer()
215 struct qcom_qspi *ctrl = spi_master_get_devdata(master); in qcom_qspi_handle_err() local
218 spin_lock_irqsave(&ctrl->lock, flags); in qcom_qspi_handle_err()
219 writel(0, ctrl->base + MSTR_INT_EN); in qcom_qspi_handle_err()
220 ctrl->xfer.rem_bytes = 0; in qcom_qspi_handle_err()
221 spin_unlock_irqrestore(&ctrl->lock, flags); in qcom_qspi_handle_err()
228 struct qcom_qspi *ctrl = spi_master_get_devdata(master); in qcom_qspi_transfer_one() local
238 ret = clk_set_rate(ctrl->clks[QSPI_CLK_CORE].clk, speed_hz * 4); in qcom_qspi_transfer_one()
240 dev_err(ctrl->dev, "Failed to set core clk %d\n", ret); in qcom_qspi_transfer_one()
244 spin_lock_irqsave(&ctrl->lock, flags); in qcom_qspi_transfer_one()
248 ctrl->xfer.dir = QSPI_READ; in qcom_qspi_transfer_one()
249 ctrl->xfer.buswidth = xfer->rx_nbits; in qcom_qspi_transfer_one()
250 ctrl->xfer.rx_buf = xfer->rx_buf; in qcom_qspi_transfer_one()
252 ctrl->xfer.dir = QSPI_WRITE; in qcom_qspi_transfer_one()
253 ctrl->xfer.buswidth = xfer->tx_nbits; in qcom_qspi_transfer_one()
254 ctrl->xfer.tx_buf = xfer->tx_buf; in qcom_qspi_transfer_one()
256 ctrl->xfer.is_last = list_is_last(&xfer->transfer_list, in qcom_qspi_transfer_one()
258 ctrl->xfer.rem_bytes = xfer->len; in qcom_qspi_transfer_one()
259 qcom_qspi_pio_xfer(ctrl); in qcom_qspi_transfer_one()
261 spin_unlock_irqrestore(&ctrl->lock, flags); in qcom_qspi_transfer_one()
271 struct qcom_qspi *ctrl; in qcom_qspi_prepare_message() local
276 ctrl = spi_master_get_devdata(master); in qcom_qspi_prepare_message()
277 spin_lock_irqsave(&ctrl->lock, flags); in qcom_qspi_prepare_message()
279 mstr_cfg = readl(ctrl->base + MSTR_CONFIG); in qcom_qspi_prepare_message()
291 writel(mstr_cfg, ctrl->base + MSTR_CONFIG); in qcom_qspi_prepare_message()
292 spin_unlock_irqrestore(&ctrl->lock, flags); in qcom_qspi_prepare_message()
297 static irqreturn_t pio_read(struct qcom_qspi *ctrl) in pio_read() argument
308 rd_fifo_status = readl(ctrl->base + RD_FIFO_STATUS); in pio_read()
311 dev_dbg(ctrl->dev, "Spurious IRQ %#x\n", rd_fifo_status); in pio_read()
316 wr_cnts = min(wr_cnts, ctrl->xfer.rem_bytes); in pio_read()
322 word_buf = ctrl->xfer.rx_buf; in pio_read()
323 ctrl->xfer.rem_bytes -= words_to_read * QSPI_BYTES_PER_WORD; in pio_read()
324 ioread32_rep(ctrl->base + RD_FIFO, word_buf, words_to_read); in pio_read()
325 ctrl->xfer.rx_buf = word_buf + words_to_read; in pio_read()
329 byte_buf = ctrl->xfer.rx_buf; in pio_read()
330 rd_fifo = readl(ctrl->base + RD_FIFO); in pio_read()
331 ctrl->xfer.rem_bytes -= bytes_to_read; in pio_read()
334 ctrl->xfer.rx_buf = byte_buf; in pio_read()
340 static irqreturn_t pio_write(struct qcom_qspi *ctrl) in pio_write() argument
342 const void *xfer_buf = ctrl->xfer.tx_buf; in pio_write()
350 wr_fifo_bytes = readl(ctrl->base + PIO_XFER_STATUS); in pio_write()
353 if (ctrl->xfer.rem_bytes < QSPI_BYTES_PER_WORD) { in pio_write()
355 wr_size = min(wr_fifo_bytes, ctrl->xfer.rem_bytes); in pio_write()
356 ctrl->xfer.rem_bytes -= wr_size; in pio_write()
361 ctrl->base + PIO_DATAOUT_1B); in pio_write()
362 ctrl->xfer.tx_buf = byte_buf; in pio_write()
369 rem_words = ctrl->xfer.rem_bytes / QSPI_BYTES_PER_WORD; in pio_write()
373 ctrl->xfer.rem_bytes -= wr_size * QSPI_BYTES_PER_WORD; in pio_write()
376 iowrite32_rep(ctrl->base + PIO_DATAOUT_4B, word_buf, wr_size); in pio_write()
377 ctrl->xfer.tx_buf = word_buf + wr_size; in pio_write()
387 struct qcom_qspi *ctrl = dev_id; in qcom_qspi_irq() local
391 spin_lock_irqsave(&ctrl->lock, flags); in qcom_qspi_irq()
393 int_status = readl(ctrl->base + MSTR_INT_STATUS); in qcom_qspi_irq()
394 writel(int_status, ctrl->base + MSTR_INT_STATUS); in qcom_qspi_irq()
396 if (ctrl->xfer.dir == QSPI_WRITE) { in qcom_qspi_irq()
398 ret = pio_write(ctrl); in qcom_qspi_irq()
401 ret = pio_read(ctrl); in qcom_qspi_irq()
406 dev_err(ctrl->dev, "IRQ error: FIFO underrun\n"); in qcom_qspi_irq()
408 dev_err(ctrl->dev, "IRQ error: FIFO overrun\n"); in qcom_qspi_irq()
410 dev_err(ctrl->dev, "IRQ error: NOC response error\n"); in qcom_qspi_irq()
414 if (!ctrl->xfer.rem_bytes) { in qcom_qspi_irq()
415 writel(0, ctrl->base + MSTR_INT_EN); in qcom_qspi_irq()
416 spi_finalize_current_transfer(dev_get_drvdata(ctrl->dev)); in qcom_qspi_irq()
419 spin_unlock_irqrestore(&ctrl->lock, flags); in qcom_qspi_irq()
428 struct qcom_qspi *ctrl; in qcom_qspi_probe() local
432 master = spi_alloc_master(dev, sizeof(*ctrl)); in qcom_qspi_probe()
438 ctrl = spi_master_get_devdata(master); in qcom_qspi_probe()
440 spin_lock_init(&ctrl->lock); in qcom_qspi_probe()
441 ctrl->dev = dev; in qcom_qspi_probe()
442 ctrl->base = devm_platform_ioremap_resource(pdev, 0); in qcom_qspi_probe()
443 if (IS_ERR(ctrl->base)) { in qcom_qspi_probe()
444 ret = PTR_ERR(ctrl->base); in qcom_qspi_probe()
448 ctrl->clks[QSPI_CLK_CORE].id = "core"; in qcom_qspi_probe()
449 ctrl->clks[QSPI_CLK_IFACE].id = "iface"; in qcom_qspi_probe()
450 ret = devm_clk_bulk_get(dev, QSPI_NUM_CLKS, ctrl->clks); in qcom_qspi_probe()
458 IRQF_TRIGGER_HIGH, dev_name(dev), ctrl); in qcom_qspi_probe()
506 struct qcom_qspi *ctrl = spi_master_get_devdata(master); in qcom_qspi_runtime_suspend() local
508 clk_bulk_disable_unprepare(QSPI_NUM_CLKS, ctrl->clks); in qcom_qspi_runtime_suspend()
516 struct qcom_qspi *ctrl = spi_master_get_devdata(master); in qcom_qspi_runtime_resume() local
518 return clk_bulk_prepare_enable(QSPI_NUM_CLKS, ctrl->clks); in qcom_qspi_runtime_resume()