Lines Matching +full:spi +full:- +full:lsb +full:- +full:first
1 // SPDX-License-Identifier: GPL-2.0-only
3 * SPI_PPC4XX SPI controller driver.
9 * Based in part on drivers/spi/spi_s3c24xx.c
17 * The PPC4xx SPI controller has no FIFO so each sent/received byte will
20 * during SPI transfers by setting max_speed_hz via the device tree.
36 #include <linux/spi/spi.h>
37 #include <linux/spi/spi_bitbang.h>
41 #include <asm/dcr-regs.h>
43 /* bits in mode register - bit 0 is MSb */
56 * SPI_PPC4XX_MODE_RD = 0 means "MSB first" - this is the normal mode
57 * SPI_PPC4XX_MODE_RD = 1 means "LSB first" - this is bit-reversed mode
85 /* clock settings (SCP and CI) for various SPI modes */
105 * CDM = (OPBCLK/4*SCPClkOut) - 1
111 /* SPI Controller driver's private data. */
113 /* bitbang has to be first */
120 /* need this to set the SPI clock */
142 static int spi_ppc4xx_txrx(struct spi_device *spi, struct spi_transfer *t) in spi_ppc4xx_txrx() argument
147 dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n", in spi_ppc4xx_txrx()
148 t->tx_buf, t->rx_buf, t->len); in spi_ppc4xx_txrx()
150 hw = spi_master_get_devdata(spi->master); in spi_ppc4xx_txrx()
152 hw->tx = t->tx_buf; in spi_ppc4xx_txrx()
153 hw->rx = t->rx_buf; in spi_ppc4xx_txrx()
154 hw->len = t->len; in spi_ppc4xx_txrx()
155 hw->count = 0; in spi_ppc4xx_txrx()
157 /* send the first byte */ in spi_ppc4xx_txrx()
158 data = hw->tx ? hw->tx[0] : 0; in spi_ppc4xx_txrx()
159 out_8(&hw->regs->txd, data); in spi_ppc4xx_txrx()
160 out_8(&hw->regs->cr, SPI_PPC4XX_CR_STR); in spi_ppc4xx_txrx()
161 wait_for_completion(&hw->done); in spi_ppc4xx_txrx()
163 return hw->count; in spi_ppc4xx_txrx()
166 static int spi_ppc4xx_setupxfer(struct spi_device *spi, struct spi_transfer *t) in spi_ppc4xx_setupxfer() argument
168 struct ppc4xx_spi *hw = spi_master_get_devdata(spi->master); in spi_ppc4xx_setupxfer()
169 struct spi_ppc4xx_cs *cs = spi->controller_state; in spi_ppc4xx_setupxfer()
176 bits_per_word = spi->bits_per_word; in spi_ppc4xx_setupxfer()
177 speed = spi->max_speed_hz; in spi_ppc4xx_setupxfer()
184 if (t->bits_per_word) in spi_ppc4xx_setupxfer()
185 bits_per_word = t->bits_per_word; in spi_ppc4xx_setupxfer()
187 if (t->speed_hz) in spi_ppc4xx_setupxfer()
188 speed = min(t->speed_hz, spi->max_speed_hz); in spi_ppc4xx_setupxfer()
191 if (!speed || (speed > spi->max_speed_hz)) { in spi_ppc4xx_setupxfer()
192 dev_err(&spi->dev, "invalid speed_hz (%d)\n", speed); in spi_ppc4xx_setupxfer()
193 return -EINVAL; in spi_ppc4xx_setupxfer()
197 out_8(&hw->regs->mode, cs->mode); in spi_ppc4xx_setupxfer()
201 scr = (hw->opb_freq / speed) - 1; in spi_ppc4xx_setupxfer()
205 dev_dbg(&spi->dev, "setting pre-scaler to %d (hz %d)\n", cdm, speed); in spi_ppc4xx_setupxfer()
207 if (in_8(&hw->regs->cdm) != cdm) in spi_ppc4xx_setupxfer()
208 out_8(&hw->regs->cdm, cdm); in spi_ppc4xx_setupxfer()
210 mutex_lock(&hw->bitbang.lock); in spi_ppc4xx_setupxfer()
211 if (!hw->bitbang.busy) { in spi_ppc4xx_setupxfer()
212 hw->bitbang.chipselect(spi, BITBANG_CS_INACTIVE); in spi_ppc4xx_setupxfer()
215 mutex_unlock(&hw->bitbang.lock); in spi_ppc4xx_setupxfer()
220 static int spi_ppc4xx_setup(struct spi_device *spi) in spi_ppc4xx_setup() argument
222 struct spi_ppc4xx_cs *cs = spi->controller_state; in spi_ppc4xx_setup()
224 if (!spi->max_speed_hz) { in spi_ppc4xx_setup()
225 dev_err(&spi->dev, "invalid max_speed_hz (must be non-zero)\n"); in spi_ppc4xx_setup()
226 return -EINVAL; in spi_ppc4xx_setup()
232 return -ENOMEM; in spi_ppc4xx_setup()
233 spi->controller_state = cs; in spi_ppc4xx_setup()
238 * no need to read-modify-write in spi_ppc4xx_setup()
240 cs->mode = SPI_PPC4XX_MODE_SPE; in spi_ppc4xx_setup()
242 switch (spi->mode & (SPI_CPHA | SPI_CPOL)) { in spi_ppc4xx_setup()
244 cs->mode |= SPI_CLK_MODE0; in spi_ppc4xx_setup()
247 cs->mode |= SPI_CLK_MODE1; in spi_ppc4xx_setup()
250 cs->mode |= SPI_CLK_MODE2; in spi_ppc4xx_setup()
253 cs->mode |= SPI_CLK_MODE3; in spi_ppc4xx_setup()
257 if (spi->mode & SPI_LSB_FIRST) in spi_ppc4xx_setup()
258 cs->mode |= SPI_PPC4XX_MODE_RD; in spi_ppc4xx_setup()
263 static void spi_ppc4xx_chipsel(struct spi_device *spi, int value) in spi_ppc4xx_chipsel() argument
265 struct ppc4xx_spi *hw = spi_master_get_devdata(spi->master); in spi_ppc4xx_chipsel()
266 unsigned int cs = spi->chip_select; in spi_ppc4xx_chipsel()
271 * case of a non-existent (dummy) chip select, do nothing. in spi_ppc4xx_chipsel()
274 if (!hw->master->num_chipselect || hw->gpios[cs] == -EEXIST) in spi_ppc4xx_chipsel()
277 cspol = spi->mode & SPI_CS_HIGH ? 1 : 0; in spi_ppc4xx_chipsel()
281 gpio_set_value(hw->gpios[cs], cspol); in spi_ppc4xx_chipsel()
293 status = in_8(&hw->regs->sr); in spi_ppc4xx_int()
298 * BSY de-asserts one cycle after the transfer is complete. The in spi_ppc4xx_int()
307 dev_dbg(hw->dev, "got interrupt but spi still busy?\n"); in spi_ppc4xx_int()
310 lstatus = in_8(&hw->regs->sr); in spi_ppc4xx_int()
314 dev_err(hw->dev, "busywait: too many loops!\n"); in spi_ppc4xx_int()
315 complete(&hw->done); in spi_ppc4xx_int()
319 status = in_8(&hw->regs->sr); in spi_ppc4xx_int()
320 dev_dbg(hw->dev, "loops %d status %x\n", cnt, status); in spi_ppc4xx_int()
324 count = hw->count; in spi_ppc4xx_int()
325 hw->count++; in spi_ppc4xx_int()
328 data = in_8(&hw->regs->rxd); in spi_ppc4xx_int()
329 if (hw->rx) in spi_ppc4xx_int()
330 hw->rx[count] = data; in spi_ppc4xx_int()
334 if (count < hw->len) { in spi_ppc4xx_int()
335 data = hw->tx ? hw->tx[count] : 0; in spi_ppc4xx_int()
336 out_8(&hw->regs->txd, data); in spi_ppc4xx_int()
337 out_8(&hw->regs->cr, SPI_PPC4XX_CR_STR); in spi_ppc4xx_int()
339 complete(&hw->done); in spi_ppc4xx_int()
345 static void spi_ppc4xx_cleanup(struct spi_device *spi) in spi_ppc4xx_cleanup() argument
347 kfree(spi->controller_state); in spi_ppc4xx_cleanup()
353 * On all 4xx PPC's the SPI bus is shared/multiplexed with in spi_ppc4xx_enable()
354 * the 2nd I2C bus. We need to enable the the SPI bus before in spi_ppc4xx_enable()
364 if (hw->master->num_chipselect) { in free_gpios()
366 for (i = 0; i < hw->master->num_chipselect; i++) in free_gpios()
367 if (gpio_is_valid(hw->gpios[i])) in free_gpios()
368 gpio_free(hw->gpios[i]); in free_gpios()
370 kfree(hw->gpios); in free_gpios()
371 hw->gpios = NULL; in free_gpios()
384 struct device_node *np = op->dev.of_node; in spi_ppc4xx_of_probe()
385 struct device *dev = &op->dev; in spi_ppc4xx_of_probe()
393 return -ENOMEM; in spi_ppc4xx_of_probe()
394 master->dev.of_node = np; in spi_ppc4xx_of_probe()
397 hw->master = master; in spi_ppc4xx_of_probe()
398 hw->dev = dev; in spi_ppc4xx_of_probe()
400 init_completion(&hw->done); in spi_ppc4xx_of_probe()
403 * A count of zero implies a single SPI device without any chip-select. in spi_ppc4xx_of_probe()
404 * Note that of_gpio_count counts all gpios assigned to this spi master. in spi_ppc4xx_of_probe()
411 hw->gpios = kcalloc(num_gpios, sizeof(*hw->gpios), GFP_KERNEL); in spi_ppc4xx_of_probe()
412 if (!hw->gpios) { in spi_ppc4xx_of_probe()
413 ret = -ENOMEM; in spi_ppc4xx_of_probe()
422 hw->gpios[i] = gpio; in spi_ppc4xx_of_probe()
425 /* Real CS - set the initial state. */ in spi_ppc4xx_of_probe()
426 ret = gpio_request(gpio, np->name); in spi_ppc4xx_of_probe()
436 } else if (gpio == -EEXIST) { in spi_ppc4xx_of_probe()
440 ret = -EINVAL; in spi_ppc4xx_of_probe()
447 bbp = &hw->bitbang; in spi_ppc4xx_of_probe()
448 bbp->master = hw->master; in spi_ppc4xx_of_probe()
449 bbp->setup_transfer = spi_ppc4xx_setupxfer; in spi_ppc4xx_of_probe()
450 bbp->chipselect = spi_ppc4xx_chipsel; in spi_ppc4xx_of_probe()
451 bbp->txrx_bufs = spi_ppc4xx_txrx; in spi_ppc4xx_of_probe()
452 bbp->use_dma = 0; in spi_ppc4xx_of_probe()
453 bbp->master->setup = spi_ppc4xx_setup; in spi_ppc4xx_of_probe()
454 bbp->master->cleanup = spi_ppc4xx_cleanup; in spi_ppc4xx_of_probe()
455 bbp->master->bits_per_word_mask = SPI_BPW_MASK(8); in spi_ppc4xx_of_probe()
457 /* the spi->mode bits understood by this driver: */ in spi_ppc4xx_of_probe()
458 bbp->master->mode_bits = in spi_ppc4xx_of_probe()
462 bbp->master->num_chipselect = num_gpios > 0 ? num_gpios : 0; in spi_ppc4xx_of_probe()
468 ret = -ENODEV; in spi_ppc4xx_of_probe()
472 clk = of_get_property(opbnp, "clock-frequency", NULL); in spi_ppc4xx_of_probe()
474 dev_err(dev, "OPB: no clock-frequency property set\n"); in spi_ppc4xx_of_probe()
476 ret = -ENODEV; in spi_ppc4xx_of_probe()
479 hw->opb_freq = *clk; in spi_ppc4xx_of_probe()
480 hw->opb_freq >>= 2; in spi_ppc4xx_of_probe()
488 hw->mapbase = resource.start; in spi_ppc4xx_of_probe()
489 hw->mapsize = resource_size(&resource); in spi_ppc4xx_of_probe()
492 if (hw->mapsize < sizeof(struct spi_ppc4xx_regs)) { in spi_ppc4xx_of_probe()
494 ret = -EINVAL; in spi_ppc4xx_of_probe()
499 hw->irqnum = irq_of_parse_and_map(np, 0); in spi_ppc4xx_of_probe()
500 ret = request_irq(hw->irqnum, spi_ppc4xx_int, in spi_ppc4xx_of_probe()
507 if (!request_mem_region(hw->mapbase, hw->mapsize, DRIVER_NAME)) { in spi_ppc4xx_of_probe()
509 ret = -EBUSY; in spi_ppc4xx_of_probe()
513 hw->regs = ioremap(hw->mapbase, sizeof(struct spi_ppc4xx_regs)); in spi_ppc4xx_of_probe()
515 if (!hw->regs) { in spi_ppc4xx_of_probe()
517 ret = -ENXIO; in spi_ppc4xx_of_probe()
523 /* Finally register our spi controller */ in spi_ppc4xx_of_probe()
524 dev->dma_mask = 0; in spi_ppc4xx_of_probe()
527 dev_err(dev, "failed to register SPI master\n"); in spi_ppc4xx_of_probe()
536 iounmap(hw->regs); in spi_ppc4xx_of_probe()
538 release_mem_region(hw->mapbase, hw->mapsize); in spi_ppc4xx_of_probe()
540 free_irq(hw->irqnum, hw); in spi_ppc4xx_of_probe()
555 spi_bitbang_stop(&hw->bitbang); in spi_ppc4xx_of_remove()
556 release_mem_region(hw->mapbase, hw->mapsize); in spi_ppc4xx_of_remove()
557 free_irq(hw->irqnum, hw); in spi_ppc4xx_of_remove()
558 iounmap(hw->regs); in spi_ppc4xx_of_remove()
565 { .compatible = "ibm,ppc4xx-spi", },
582 MODULE_DESCRIPTION("Simple PPC4xx SPI Driver");