2  * Broadcom BCM63XX High Speed SPI Controller driver
4  * Copyright 2000-2010 Broadcom Corporation
5  * Copyright 2012-2013 Jonas Gorski <jogo@openwrt.org>
17 #include <linux/dma-mapping.h>
20 #include <linux/spi/spi.h>
96 #define HSSPI_BUS_NUM				1 /* 0 is legacy SPI */
112 static void bcm63xx_hsspi_set_cs(struct bcm63xx_hsspi *bs, unsigned int cs,  in bcm63xx_hsspi_set_cs()  argument
117 	mutex_lock(&bs->bus_mutex);  in bcm63xx_hsspi_set_cs()
118 	reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_set_cs()
120 	reg &= ~BIT(cs);  in bcm63xx_hsspi_set_cs()
121 	if (active == !(bs->cs_polarity & BIT(cs)))  in bcm63xx_hsspi_set_cs()
122 		reg |= BIT(cs);  in bcm63xx_hsspi_set_cs()
124 	__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_set_cs()
125 	mutex_unlock(&bs->bus_mutex);  in bcm63xx_hsspi_set_cs()
129 				  struct spi_device *spi, int hz)  in bcm63xx_hsspi_set_clk()  argument
131 	unsigned int profile = spi->chip_select;  in bcm63xx_hsspi_set_clk()
134 	reg = DIV_ROUND_UP(2048, DIV_ROUND_UP(bs->speed_hz, hz));  in bcm63xx_hsspi_set_clk()
136 		     bs->regs + HSSPI_PROFILE_CLK_CTRL_REG(profile));  in bcm63xx_hsspi_set_clk()
138 	reg = __raw_readl(bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));  in bcm63xx_hsspi_set_clk()
143 	__raw_writel(reg, bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));  in bcm63xx_hsspi_set_clk()
145 	mutex_lock(&bs->bus_mutex);  in bcm63xx_hsspi_set_clk()
147 	reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_set_clk()
149 	if (spi->mode & SPI_CPOL)  in bcm63xx_hsspi_set_clk()
151 	__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_set_clk()
152 	mutex_unlock(&bs->bus_mutex);  in bcm63xx_hsspi_set_clk()
155 static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t)  in bcm63xx_hsspi_do_txrx()  argument
157 	struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master);  in bcm63xx_hsspi_do_txrx()
158 	unsigned int chip_select = spi->chip_select;  in bcm63xx_hsspi_do_txrx()
160 	int pending = t->len;  in bcm63xx_hsspi_do_txrx()
162 	const u8 *tx = t->tx_buf;  in bcm63xx_hsspi_do_txrx()
163 	u8 *rx = t->rx_buf;  in bcm63xx_hsspi_do_txrx()
165 	bcm63xx_hsspi_set_clk(bs, spi, t->speed_hz);  in bcm63xx_hsspi_do_txrx()
166 	bcm63xx_hsspi_set_cs(bs, spi->chip_select, true);  in bcm63xx_hsspi_do_txrx()
176 		step_size -= HSSPI_OPCODE_LEN;  in bcm63xx_hsspi_do_txrx()
178 	if ((opcode == HSSPI_OP_READ && t->rx_nbits == SPI_NBITS_DUAL) ||  in bcm63xx_hsspi_do_txrx()
179 	    (opcode == HSSPI_OP_WRITE && t->tx_nbits == SPI_NBITS_DUAL))  in bcm63xx_hsspi_do_txrx()
184 		     bs->regs + HSSPI_PROFILE_MODE_CTRL_REG(chip_select));  in bcm63xx_hsspi_do_txrx()
189 		reinit_completion(&bs->done);  in bcm63xx_hsspi_do_txrx()
191 			memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN, tx, curr_step);  in bcm63xx_hsspi_do_txrx()
195 		__raw_writew(opcode | curr_step, bs->fifo);  in bcm63xx_hsspi_do_txrx()
199 			     bs->regs + HSSPI_INT_MASK_REG);  in bcm63xx_hsspi_do_txrx()
205 			     bs->regs + HSSPI_PINGPONG_COMMAND_REG(0));  in bcm63xx_hsspi_do_txrx()
207 		if (wait_for_completion_timeout(&bs->done, HZ) == 0) {  in bcm63xx_hsspi_do_txrx()
208 			dev_err(&bs->pdev->dev, "transfer timed out!\n");  in bcm63xx_hsspi_do_txrx()
209 			return -ETIMEDOUT;  in bcm63xx_hsspi_do_txrx()
213 			memcpy_fromio(rx, bs->fifo, curr_step);  in bcm63xx_hsspi_do_txrx()
217 		pending -= curr_step;  in bcm63xx_hsspi_do_txrx()
223 static int bcm63xx_hsspi_setup(struct spi_device *spi)  in bcm63xx_hsspi_setup()  argument
225 	struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master);  in bcm63xx_hsspi_setup()
228 	reg = __raw_readl(bs->regs +  in bcm63xx_hsspi_setup()
229 			  HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select));  in bcm63xx_hsspi_setup()
231 	if (spi->mode & SPI_CPHA)  in bcm63xx_hsspi_setup()
235 	__raw_writel(reg, bs->regs +  in bcm63xx_hsspi_setup()
236 		     HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select));  in bcm63xx_hsspi_setup()
238 	mutex_lock(&bs->bus_mutex);  in bcm63xx_hsspi_setup()
239 	reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_setup()
242 	if ((reg & GLOBAL_CTRL_CS_POLARITY_MASK) == bs->cs_polarity) {  in bcm63xx_hsspi_setup()
243 		if (spi->mode & SPI_CS_HIGH)  in bcm63xx_hsspi_setup()
244 			reg |= BIT(spi->chip_select);  in bcm63xx_hsspi_setup()
246 			reg &= ~BIT(spi->chip_select);  in bcm63xx_hsspi_setup()
247 		__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_setup()
250 	if (spi->mode & SPI_CS_HIGH)  in bcm63xx_hsspi_setup()
251 		bs->cs_polarity |= BIT(spi->chip_select);  in bcm63xx_hsspi_setup()
253 		bs->cs_polarity &= ~BIT(spi->chip_select);  in bcm63xx_hsspi_setup()
255 	mutex_unlock(&bs->bus_mutex);  in bcm63xx_hsspi_setup()
265 	struct spi_device *spi = msg->spi;  in bcm63xx_hsspi_transfer_one()  local
266 	int status = -EINVAL;  in bcm63xx_hsspi_transfer_one()
270 	/* This controller does not support keeping CS active during idle.  in bcm63xx_hsspi_transfer_one()
278 	 *    the multiplexed nature of SPI the actual target will receive  in bcm63xx_hsspi_transfer_one()
284 	dummy_cs = !spi->chip_select;  in bcm63xx_hsspi_transfer_one()
287 	list_for_each_entry(t, &msg->transfers, transfer_list) {  in bcm63xx_hsspi_transfer_one()
288 		status = bcm63xx_hsspi_do_txrx(spi, t);  in bcm63xx_hsspi_transfer_one()
292 		msg->actual_length += t->len;  in bcm63xx_hsspi_transfer_one()
294 		if (t->delay_usecs)  in bcm63xx_hsspi_transfer_one()
295 			udelay(t->delay_usecs);  in bcm63xx_hsspi_transfer_one()
297 		if (t->cs_change)  in bcm63xx_hsspi_transfer_one()
298 			bcm63xx_hsspi_set_cs(bs, spi->chip_select, false);  in bcm63xx_hsspi_transfer_one()
301 	mutex_lock(&bs->bus_mutex);  in bcm63xx_hsspi_transfer_one()
302 	reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_transfer_one()
304 	reg |= bs->cs_polarity;  in bcm63xx_hsspi_transfer_one()
305 	__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_transfer_one()
306 	mutex_unlock(&bs->bus_mutex);  in bcm63xx_hsspi_transfer_one()
308 	msg->status = status;  in bcm63xx_hsspi_transfer_one()
318 	if (__raw_readl(bs->regs + HSSPI_INT_STATUS_MASKED_REG) == 0)  in bcm63xx_hsspi_interrupt()
321 	__raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);  in bcm63xx_hsspi_interrupt()
322 	__raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);  in bcm63xx_hsspi_interrupt()
324 	complete(&bs->done);  in bcm63xx_hsspi_interrupt()
334 	struct device *dev = &pdev->dev;  in bcm63xx_hsspi_probe()
372 			ret = -EINVAL;  in bcm63xx_hsspi_probe()
377 	master = spi_alloc_master(&pdev->dev, sizeof(*bs));  in bcm63xx_hsspi_probe()
379 		ret = -ENOMEM;  in bcm63xx_hsspi_probe()
384 	bs->pdev = pdev;  in bcm63xx_hsspi_probe()
385 	bs->clk = clk;  in bcm63xx_hsspi_probe()
386 	bs->pll_clk = pll_clk;  in bcm63xx_hsspi_probe()
387 	bs->regs = regs;  in bcm63xx_hsspi_probe()
388 	bs->speed_hz = rate;  in bcm63xx_hsspi_probe()
389 	bs->fifo = (u8 __iomem *)(bs->regs + HSSPI_FIFO_REG(0));  in bcm63xx_hsspi_probe()
391 	mutex_init(&bs->bus_mutex);  in bcm63xx_hsspi_probe()
392 	init_completion(&bs->done);  in bcm63xx_hsspi_probe()
394 	master->dev.of_node = dev->of_node;  in bcm63xx_hsspi_probe()
395 	if (!dev->of_node)  in bcm63xx_hsspi_probe()
396 		master->bus_num = HSSPI_BUS_NUM;  in bcm63xx_hsspi_probe()
398 	of_property_read_u32(dev->of_node, "num-cs", &num_cs);  in bcm63xx_hsspi_probe()
400 		dev_warn(dev, "unsupported number of cs (%i), reducing to 8\n",  in bcm63xx_hsspi_probe()
404 	master->num_chipselect = num_cs;  in bcm63xx_hsspi_probe()
405 	master->setup = bcm63xx_hsspi_setup;  in bcm63xx_hsspi_probe()
406 	master->transfer_one_message = bcm63xx_hsspi_transfer_one;  in bcm63xx_hsspi_probe()
407 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH |  in bcm63xx_hsspi_probe()
409 	master->bits_per_word_mask = SPI_BPW_MASK(8);  in bcm63xx_hsspi_probe()
410 	master->auto_runtime_pm = true;  in bcm63xx_hsspi_probe()
415 	__raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);  in bcm63xx_hsspi_probe()
418 	__raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);  in bcm63xx_hsspi_probe()
420 	/* read out default CS polarities */  in bcm63xx_hsspi_probe()
421 	reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_probe()
422 	bs->cs_polarity = reg & GLOBAL_CTRL_CS_POLARITY_MASK;  in bcm63xx_hsspi_probe()
424 		     bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_probe()
427 			       pdev->name, bs);  in bcm63xx_hsspi_probe()
455 	__raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);  in bcm63xx_hsspi_remove()
456 	clk_disable_unprepare(bs->pll_clk);  in bcm63xx_hsspi_remove()
457 	clk_disable_unprepare(bs->clk);  in bcm63xx_hsspi_remove()
469 	clk_disable_unprepare(bs->pll_clk);  in bcm63xx_hsspi_suspend()
470 	clk_disable_unprepare(bs->clk);  in bcm63xx_hsspi_suspend()
481 	ret = clk_prepare_enable(bs->clk);  in bcm63xx_hsspi_resume()
485 	if (bs->pll_clk) {  in bcm63xx_hsspi_resume()
486 		ret = clk_prepare_enable(bs->pll_clk);  in bcm63xx_hsspi_resume()
501 	{ .compatible = "brcm,bcm6328-hsspi", },
508 		.name	= "bcm63xx-hsspi",
519 MODULE_DESCRIPTION("Broadcom BCM63xx High Speed SPI Controller driver");