59 	bool (*get_power)(struct meson_ee_pwrc_domain *pwrc_domain);
199 static bool pwrc_ee_get_power(struct meson_ee_pwrc_domain *pwrc_domain);
240 static bool pwrc_ee_get_power(struct meson_ee_pwrc_domain *pwrc_domain)  in pwrc_ee_get_power()  argument
244 	regmap_read(pwrc_domain->pwrc->regmap_ao,  in pwrc_ee_get_power()
245 		    pwrc_domain->desc.top_pd->sleep_reg, &reg);  in pwrc_ee_get_power()
247 	return (reg & pwrc_domain->desc.top_pd->sleep_mask);  in pwrc_ee_get_power()
252 	struct meson_ee_pwrc_domain *pwrc_domain =  in meson_ee_pwrc_off()  local
256 	if (pwrc_domain->desc.top_pd)  in meson_ee_pwrc_off()
257 		regmap_update_bits(pwrc_domain->pwrc->regmap_ao,  in meson_ee_pwrc_off()
258 				   pwrc_domain->desc.top_pd->sleep_reg,  in meson_ee_pwrc_off()
259 				   pwrc_domain->desc.top_pd->sleep_mask,  in meson_ee_pwrc_off()
260 				   pwrc_domain->desc.top_pd->sleep_mask);  in meson_ee_pwrc_off()
263 	for (i = 0 ; i < pwrc_domain->desc.mem_pd_count ; ++i)  in meson_ee_pwrc_off()
264 		regmap_update_bits(pwrc_domain->pwrc->regmap_hhi,  in meson_ee_pwrc_off()
265 				   pwrc_domain->desc.mem_pd[i].reg,  in meson_ee_pwrc_off()
266 				   pwrc_domain->desc.mem_pd[i].mask,  in meson_ee_pwrc_off()
267 				   pwrc_domain->desc.mem_pd[i].mask);  in meson_ee_pwrc_off()
271 	if (pwrc_domain->desc.top_pd)  in meson_ee_pwrc_off()
272 		regmap_update_bits(pwrc_domain->pwrc->regmap_ao,  in meson_ee_pwrc_off()
273 				   pwrc_domain->desc.top_pd->iso_reg,  in meson_ee_pwrc_off()
274 				   pwrc_domain->desc.top_pd->iso_mask,  in meson_ee_pwrc_off()
275 				   pwrc_domain->desc.top_pd->iso_mask);  in meson_ee_pwrc_off()
277 	if (pwrc_domain->num_clks) {  in meson_ee_pwrc_off()
279 		clk_bulk_disable_unprepare(pwrc_domain->num_clks,  in meson_ee_pwrc_off()
280 					   pwrc_domain->clks);  in meson_ee_pwrc_off()
288 	struct meson_ee_pwrc_domain *pwrc_domain =  in meson_ee_pwrc_on()  local
292 	if (pwrc_domain->desc.top_pd)  in meson_ee_pwrc_on()
293 		regmap_update_bits(pwrc_domain->pwrc->regmap_ao,  in meson_ee_pwrc_on()
294 				   pwrc_domain->desc.top_pd->sleep_reg,  in meson_ee_pwrc_on()
295 				   pwrc_domain->desc.top_pd->sleep_mask, 0);  in meson_ee_pwrc_on()
298 	for (i = 0 ; i < pwrc_domain->desc.mem_pd_count ; ++i)  in meson_ee_pwrc_on()
299 		regmap_update_bits(pwrc_domain->pwrc->regmap_hhi,  in meson_ee_pwrc_on()
300 				   pwrc_domain->desc.mem_pd[i].reg,  in meson_ee_pwrc_on()
301 				   pwrc_domain->desc.mem_pd[i].mask, 0);  in meson_ee_pwrc_on()
305 	ret = reset_control_assert(pwrc_domain->rstc);  in meson_ee_pwrc_on()
309 	if (pwrc_domain->desc.top_pd)  in meson_ee_pwrc_on()
310 		regmap_update_bits(pwrc_domain->pwrc->regmap_ao,  in meson_ee_pwrc_on()
311 				   pwrc_domain->desc.top_pd->iso_reg,  in meson_ee_pwrc_on()
312 				   pwrc_domain->desc.top_pd->iso_mask, 0);  in meson_ee_pwrc_on()
314 	ret = reset_control_deassert(pwrc_domain->rstc);  in meson_ee_pwrc_on()
318 	return clk_bulk_prepare_enable(pwrc_domain->num_clks,  in meson_ee_pwrc_on()
319 				       pwrc_domain->clks);  in meson_ee_pwrc_on()