Lines Matching refs:uint32_t
80 uint32_t Revision:8;
81 uint32_t InId:24;
83 uint32_t word;
89 uint32_t CmdRsp:16;
90 uint32_t Size:16;
92 uint32_t word;
115 uint32_t PortID;
134 uint32_t PortId; /* For RFT_ID requests */
137 uint32_t rsvd0:16;
138 uint32_t rsvd1:7;
139 uint32_t fcpReg:1; /* Type 8 */
140 uint32_t rsvd2:2;
141 uint32_t ipReg:1; /* Type 5 */
142 uint32_t rsvd3:5;
144 uint32_t rsvd0:16;
145 uint32_t fcpReg:1; /* Type 8 */
146 uint32_t rsvd1:7;
147 uint32_t rsvd3:5;
148 uint32_t ipReg:1; /* Type 5 */
149 uint32_t rsvd2:2;
152 uint32_t rsvd[7];
155 uint32_t PortId; /* For RNN_ID requests */
164 uint32_t port_id;
167 uint32_t PortId;
172 uint32_t PortId;
178 uint32_t PortId;
181 uint32_t fc4_types[8];
185 uint32_t PortId;
440 uint32_t r_a_tov; /* R_A_TOV must be in B.E. format */
443 uint32_t e_d_tov; /* E_D_TOV must be in B.E. format */
526 uint32_t vid;
528 uint32_t flags;
538 uint32_t word0;
557 uint32_t word1;
660 uint32_t lsRjtError;
711 uint32_t nPortId32; /* Access nPortId as a word */
762 uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
764 uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
834 uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
836 uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
838 uint32_t word3Reserved1; /* FC Parm Word 3, bit 0:31 */
842 uint32_t hardAL_PA;
845 uint32_t DID;
849 uint32_t Mflags:8;
850 uint32_t Odid:24;
860 uint32_t Rflags:8;
861 uint32_t Rdid:24;
873 uint32_t Fdid;
892 uint32_t unitType;
896 uint32_t physPort;
897 uint32_t attachedNodes;
924 uint32_t portNum;
932 uint32_t linkFailureCnt;
933 uint32_t lossSyncCnt;
934 uint32_t lossSignalCnt;
935 uint32_t primSeqErrCnt;
936 uint32_t invalidXmitWord;
937 uint32_t crcCnt;
941 uint32_t rls;
951 uint32_t linkFailureCnt;
952 uint32_t lossSyncCnt;
953 uint32_t lossSignalCnt;
954 uint32_t primSeqErrCnt;
955 uint32_t invalidXmitWord;
956 uint32_t crcCnt;
960 uint32_t rrq;
967 uint32_t rrq_exchg;
980 uint32_t ratov;
981 uint32_t edtov;
982 uint32_t qtov;
1002 uint32_t maxsize;
1003 uint32_t index;
1007 uint32_t portNum;
1008 uint32_t portID;
1013 uint32_t listLen;
1014 uint32_t index;
1021 uint32_t word;
1073 uint32_t lcb_command; /* ELS command opcode (0x81) */
1093 uint32_t lcb_ls_acc; /* Acceptance of LCB request (0x02) */
1138 uint32_t link_failure_cnt;
1139 uint32_t loss_of_synch_cnt;
1140 uint32_t loss_of_signal_cnt;
1141 uint32_t primitive_seq_proto_err;
1142 uint32_t invalid_trans_word;
1143 uint32_t invalid_crc_cnt;
1149 uint32_t tag; /* 0001 0003h */
1150 uint32_t length; /* set to size of payload struct */
1156 uint32_t CorrectedBlocks;
1157 uint32_t UncorrectableBlocks;
1162 uint32_t tag;
1163 uint32_t length;
1169 uint32_t port_type; /* bits 31-30 only */
1174 uint32_t tag; /* 0001 0002h */
1175 uint32_t length; /* set to size of payload struct */
1211 uint32_t tag; /* 00010001h */
1212 uint32_t length; /* set to size of payload struct */
1219 uint32_t tag; /* 0000 0003h, big endian */
1220 uint32_t length; /* size of RDP_N_PORT_ID struct */
1221 uint32_t nport_id : 12;
1222 uint32_t reserved : 8;
1227 uint32_t els_req; /* Request payload word 0 value.*/
1232 uint32_t tag; /* Descriptor tag 1 */
1233 uint32_t length; /* set to size of payload struct. */
1249 uint32_t tag;
1250 uint32_t length; /* set to size of sfp_info struct */
1256 uint32_t port_bbc; /* FC_Port buffer-to-buffer credit */
1257 uint32_t attached_port_bbc;
1258 uint32_t rtt; /* Round trip time */
1262 uint32_t tag;
1263 uint32_t length;
1286 uint32_t function_flags;
1290 uint32_t tag;
1291 uint32_t length;
1306 uint32_t tag;
1307 uint32_t length;
1312 uint32_t rdp_command; /* ELS command opcode (0x18)*/
1313 uint32_t rdp_des_length; /* RDP Payload Word 1 */
1319 uint32_t reply_sequence; /* FC word0 LS_ACC or LS_RJT */
1320 uint32_t length; /* FC Word 1 */
1347 uint32_t EntryCnt;
1348 uint32_t pe; /* Variable-length array */
1356 uint32_t AttrType:16;
1357 uint32_t AttrLen:16;
1358 uint32_t AttrValue; /* Marks start of Value (ATTRIBUTE_ENTRY) */
1365 uint32_t AttrInt;
1378 uint32_t EntryCnt; /* Number of HBA attribute entries */
1660 uint32_t hostAtt; /* See definitions for Host Attention
1662 uint32_t chipAtt; /* See definitions for Chip Attention
1664 uint32_t hostStatus; /* See definitions for Host Status register */
1665 uint32_t hostControl; /* See definitions for Host Control register */
1666 uint32_t buiConfig; /* See definitions for BIU configuration
2005 uint32_t bdeAddress;
2007 uint32_t bdeReserved:4;
2008 uint32_t bdeAddrHigh:4;
2009 uint32_t bdeSize:24;
2011 uint32_t bdeSize:24;
2012 uint32_t bdeAddrHigh:4;
2013 uint32_t bdeReserved:4;
2019 uint32_t bdeFlags:8; /* BDL Flags */
2020 uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
2022 uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
2023 uint32_t bdeFlags:8; /* BDL Flags */
2026 uint32_t addrLow; /* Address 0:31 */
2027 uint32_t addrHigh; /* Address 32:63 */
2028 uint32_t ulpIoTag32; /* Can be used for 32 bit I/O Tag */
2059 uint32_t word0;
2066 uint32_t reftag; /* Reference Tag Value */
2067 uint32_t reftagtr; /* Reference Tag Translation Value */
2071 uint32_t word0;
2078 uint32_t word1;
2091 uint32_t word2;
2122 uint32_t word0;
2129 uint32_t addrHigh;
2130 uint32_t addrLow;
2137 uint32_t rsvd2:25;
2138 uint32_t acknowledgment:1;
2139 uint32_t version:1;
2140 uint32_t erase_or_prog:1;
2141 uint32_t update_flash:1;
2142 uint32_t update_ram:1;
2143 uint32_t method:1;
2144 uint32_t load_cmplt:1;
2146 uint32_t load_cmplt:1;
2147 uint32_t method:1;
2148 uint32_t update_ram:1;
2149 uint32_t update_flash:1;
2150 uint32_t erase_or_prog:1;
2151 uint32_t version:1;
2152 uint32_t acknowledgment:1;
2153 uint32_t rsvd2:25;
2156 uint32_t dl_to_adr_low;
2157 uint32_t dl_to_adr_high;
2158 uint32_t dl_len;
2160 uint32_t dl_from_mbx_offset;
2170 uint32_t rsvd1[3]; /* Read as all one's */
2171 uint32_t rsvd2; /* Read as all zero's */
2172 uint32_t portname[2]; /* N_PORT name */
2173 uint32_t nodename[2]; /* NODE name */
2176 uint32_t pref_DID:24;
2177 uint32_t hardAL_PA:8;
2179 uint32_t hardAL_PA:8;
2180 uint32_t pref_DID:24;
2183 uint32_t rsvd3[21]; /* Read as all one's */
2189 uint32_t rsvd1[3]; /* Must be all one's */
2190 uint32_t rsvd2; /* Must be all zero's */
2191 uint32_t portname[2]; /* N_PORT name */
2192 uint32_t nodename[2]; /* NODE name */
2195 uint32_t pref_DID:24;
2196 uint32_t hardAL_PA:8;
2198 uint32_t hardAL_PA:8;
2199 uint32_t pref_DID:24;
2202 uint32_t rsvd3[21]; /* Must be all one's */
2209 uint32_t rsvd1;
2224 uint32_t word1;
2229 uint32_t offset;
2237 uint32_t rsvd1:24;
2238 uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
2240 uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
2241 uint32_t rsvd1:24;
2266 uint32_t link_speed;
2284 uint32_t rsvd1;
2291 uint32_t cr:1;
2292 uint32_t ci:1;
2293 uint32_t cr_delay:6;
2294 uint32_t cr_count:8;
2295 uint32_t rsvd1:8;
2296 uint32_t MaxBBC:8;
2298 uint32_t MaxBBC:8;
2299 uint32_t rsvd1:8;
2300 uint32_t cr_count:8;
2301 uint32_t cr_delay:6;
2302 uint32_t ci:1;
2303 uint32_t cr:1;
2306 uint32_t myId;
2307 uint32_t rsvd2;
2308 uint32_t edtov;
2309 uint32_t arbtov;
2310 uint32_t ratov;
2311 uint32_t rttov;
2312 uint32_t altov;
2313 uint32_t crtov;
2316 uint32_t rsvd4:19;
2317 uint32_t cscn:1;
2318 uint32_t bbscn:4;
2319 uint32_t rsvd3:8;
2321 uint32_t rsvd3:8;
2322 uint32_t bbscn:4;
2323 uint32_t cscn:1;
2324 uint32_t rsvd4:19;
2328 uint32_t rrq_enable:1;
2329 uint32_t rrq_immed:1;
2330 uint32_t rsvd5:29;
2331 uint32_t ack0_enable:1;
2333 uint32_t ack0_enable:1;
2334 uint32_t rsvd5:29;
2335 uint32_t rrq_immed:1;
2336 uint32_t rrq_enable:1;
2359 uint32_t unused1:24;
2360 uint32_t numRing:8;
2362 uint32_t numRing:8;
2363 uint32_t unused1:24;
2367 uint32_t hbainit;
2374 uint32_t unused2:6;
2375 uint32_t recvSeq:1;
2376 uint32_t recvNotify:1;
2377 uint32_t numMask:8;
2378 uint32_t profile:8;
2379 uint32_t unused1:4;
2380 uint32_t ring:4;
2382 uint32_t ring:4;
2383 uint32_t unused1:4;
2384 uint32_t profile:8;
2385 uint32_t numMask:8;
2386 uint32_t recvNotify:1;
2387 uint32_t recvSeq:1;
2388 uint32_t unused2:6;
2405 uint32_t ring_no;
2412 uint32_t cr:1;
2413 uint32_t ci:1;
2414 uint32_t cr_delay:6;
2415 uint32_t cr_count:8;
2416 uint32_t InitBBC:8;
2417 uint32_t MaxBBC:8;
2419 uint32_t MaxBBC:8;
2420 uint32_t InitBBC:8;
2421 uint32_t cr_count:8;
2422 uint32_t cr_delay:6;
2423 uint32_t ci:1;
2424 uint32_t cr:1;
2428 uint32_t topology:8;
2429 uint32_t myDid:24;
2431 uint32_t myDid:24;
2432 uint32_t topology:8;
2437 uint32_t AR:1;
2438 uint32_t IR:1;
2439 uint32_t rsvd1:29;
2440 uint32_t ack0:1;
2442 uint32_t ack0:1;
2443 uint32_t rsvd1:29;
2444 uint32_t IR:1;
2445 uint32_t AR:1;
2448 uint32_t edtov;
2449 uint32_t arbtov;
2450 uint32_t ratov;
2451 uint32_t rttov;
2452 uint32_t altov;
2453 uint32_t lmt;
2465 uint32_t rsvd2;
2466 uint32_t rsvd3;
2467 uint32_t max_xri;
2468 uint32_t max_iocb;
2469 uint32_t max_rpi;
2470 uint32_t avail_xri;
2471 uint32_t avail_iocb;
2472 uint32_t avail_rpi;
2473 uint32_t max_vpi;
2474 uint32_t rsvd4;
2475 uint32_t rsvd5;
2476 uint32_t avail_vpi;
2483 uint32_t rsvd2:7;
2484 uint32_t recvNotify:1;
2485 uint32_t numMask:8;
2486 uint32_t profile:8;
2487 uint32_t rsvd1:4;
2488 uint32_t ring:4;
2490 uint32_t ring:4;
2491 uint32_t rsvd1:4;
2492 uint32_t profile:8;
2493 uint32_t numMask:8;
2494 uint32_t recvNotify:1;
2495 uint32_t rsvd2:7;
2533 uint32_t rsvd1;
2534 uint32_t rsvd2;
2553 uint32_t rsvd1:31;
2554 uint32_t clrCounters:1;
2558 uint32_t clrCounters:1;
2559 uint32_t rsvd1:31;
2564 uint32_t xmitByteCnt;
2565 uint32_t rcvByteCnt;
2566 uint32_t xmitFrameCnt;
2567 uint32_t rcvFrameCnt;
2568 uint32_t xmitSeqCnt;
2569 uint32_t rcvSeqCnt;
2570 uint32_t totalOrigExchanges;
2571 uint32_t totalRespExchanges;
2572 uint32_t rcvPbsyCnt;
2573 uint32_t rcvFbsyCnt;
2583 uint32_t rsvd2:8;
2584 uint32_t DID:24;
2588 uint32_t DID:24;
2589 uint32_t rsvd2:8;
2607 uint32_t rsvd2:8;
2608 uint32_t DID:24;
2609 uint32_t rsvd3:8;
2610 uint32_t SID:24;
2611 uint32_t rsvd4;
2617 uint32_t rsvd6:30;
2618 uint32_t si:1;
2619 uint32_t exchOrig:1;
2625 uint32_t DID:24;
2626 uint32_t rsvd2:8;
2627 uint32_t SID:24;
2628 uint32_t rsvd3:8;
2629 uint32_t rsvd4;
2635 uint32_t exchOrig:1;
2636 uint32_t si:1;
2637 uint32_t rsvd6:30;
2645 uint32_t cv:1;
2646 uint32_t rr:1;
2647 uint32_t rsvd2:2;
2648 uint32_t v3req:1;
2649 uint32_t v3rsp:1;
2650 uint32_t rsvd1:25;
2651 uint32_t rv:1;
2653 uint32_t rv:1;
2654 uint32_t rsvd1:25;
2655 uint32_t v3rsp:1;
2656 uint32_t v3req:1;
2657 uint32_t rsvd2:2;
2658 uint32_t rr:1;
2659 uint32_t cv:1;
2662 uint32_t biuRev;
2663 uint32_t smRev;
2665 uint32_t smFwRev;
2687 uint32_t endecRev;
2700 uint32_t postKernRev;
2701 uint32_t opFwRev;
2703 uint32_t sli1FwRev;
2705 uint32_t sli2FwRev;
2707 uint32_t sli3Feat;
2708 uint32_t RandomData[6];
2714 uint32_t word0;
2744 uint32_t linkFailureCnt;
2745 uint32_t lossSyncCnt;
2746 uint32_t lossSignalCnt;
2747 uint32_t primSeqErrCnt;
2748 uint32_t invalidXmitWord;
2749 uint32_t crcCnt;
2750 uint32_t primSeqTimeout;
2751 uint32_t elasticOverrun;
2752 uint32_t arbTimeout;
2753 uint32_t advRecBufCredit;
2754 uint32_t curRecBufCredit;
2755 uint32_t advTransBufCredit;
2756 uint32_t curTransBufCredit;
2757 uint32_t recEofCount;
2758 uint32_t recEofdtiCount;
2759 uint32_t recEofniCount;
2760 uint32_t recSofcount;
2761 uint32_t rsvd1;
2762 uint32_t rsvd2;
2763 uint32_t recDrpXriCount;
2764 uint32_t fecCorrBlkCount;
2765 uint32_t fecUncorrBlkCount;
2775 uint32_t rsvd2:8;
2776 uint32_t did:24;
2780 uint32_t did:24;
2781 uint32_t rsvd2:8;
2812 uint32_t word;
2821 uint32_t rsvd2;
2822 uint32_t rsvd3;
2823 uint32_t rsvd4;
2824 uint32_t rsvd5;
2830 uint32_t rsvd2;
2831 uint32_t rsvd3;
2832 uint32_t rsvd4;
2833 uint32_t rsvd5;
2842 uint32_t rsvd1;
2843 uint32_t rsvd2:7;
2844 uint32_t upd:1;
2845 uint32_t sid:24;
2846 uint32_t wwn[2];
2847 uint32_t rsvd5;
2851 uint32_t rsvd1;
2852 uint32_t sid:24;
2853 uint32_t upd:1;
2854 uint32_t rsvd2:7;
2855 uint32_t wwn[2];
2856 uint32_t rsvd5;
2864 uint32_t rsvd1;
2872 uint32_t rsvd3;
2873 uint32_t rsvd4;
2874 uint32_t rsvd5;
2887 uint32_t did;
2888 uint32_t rsvd2;
2889 uint32_t rsvd3;
2890 uint32_t rsvd4;
2891 uint32_t rsvd5;
2903 uint32_t eventTag; /* Event tag */
2904 uint32_t word2;
2924 uint32_t word3;
2943 uint32_t word7;
2962 uint32_t word8;
2997 uint32_t eventTag; /* Event tag */
2998 uint32_t rsvd1;
3005 uint32_t rsvd:25;
3006 uint32_t ra:1;
3007 uint32_t co:1;
3008 uint32_t cv:1;
3009 uint32_t type:4;
3010 uint32_t entry_index:16;
3011 uint32_t region_id:16;
3013 uint32_t type:4;
3014 uint32_t cv:1;
3015 uint32_t co:1;
3016 uint32_t ra:1;
3017 uint32_t rsvd:25;
3018 uint32_t region_id:16;
3019 uint32_t entry_index:16;
3022 uint32_t sli4_length;
3023 uint32_t word_cnt;
3024 uint32_t resp_offset;
3057 uint32_t signature;
3058 uint32_t rev;
3060 uint32_t resvd[66];
3068 uint32_t ver:4; /* Major Version */
3069 uint32_t rev:4; /* Revision */
3070 uint32_t lev:2; /* Level */
3071 uint32_t dist:2; /* Dist Type */
3072 uint32_t num:4; /* number after dist type */
3074 uint32_t num:4; /* number after dist type */
3075 uint32_t dist:2; /* Dist Type */
3076 uint32_t lev:2; /* Level */
3077 uint32_t rev:4; /* Revision */
3078 uint32_t ver:4; /* Major Version */
3088 uint32_t rsvd2:16;
3089 uint32_t type:8;
3090 uint32_t rsvd:1;
3091 uint32_t ra:1;
3092 uint32_t co:1;
3093 uint32_t cv:1;
3094 uint32_t req:4;
3095 uint32_t entry_length:16;
3096 uint32_t region_id:16;
3098 uint32_t req:4;
3099 uint32_t cv:1;
3100 uint32_t co:1;
3101 uint32_t ra:1;
3102 uint32_t rsvd:1;
3103 uint32_t type:8;
3104 uint32_t rsvd2:16;
3105 uint32_t region_id:16;
3106 uint32_t entry_length:16;
3109 uint32_t resp_info;
3110 uint32_t byte_cnt;
3111 uint32_t data_offset;
3133 uint32_t rsvd1 :7;
3134 uint32_t recvNotify :1; /* Receive Notification */
3135 uint32_t numMask :8; /* # Mask Entries */
3136 uint32_t profile :8; /* Selection Profile */
3137 uint32_t rsvd2 :8;
3139 uint32_t rsvd2 :8;
3140 uint32_t profile :8; /* Selection Profile */
3141 uint32_t numMask :8; /* # Mask Entries */
3142 uint32_t recvNotify :1; /* Receive Notification */
3143 uint32_t rsvd1 :7;
3147 uint32_t hbqId :16;
3148 uint32_t rsvd3 :12;
3149 uint32_t ringMask :4;
3151 uint32_t ringMask :4;
3152 uint32_t rsvd3 :12;
3153 uint32_t hbqId :16;
3157 uint32_t entry_count :16;
3158 uint32_t rsvd4 :8;
3159 uint32_t headerLen :8;
3161 uint32_t headerLen :8;
3162 uint32_t rsvd4 :8;
3163 uint32_t entry_count :16;
3166 uint32_t hbqaddrLow;
3167 uint32_t hbqaddrHigh;
3170 uint32_t rsvd5 :31;
3171 uint32_t logEntry :1;
3173 uint32_t logEntry :1;
3174 uint32_t rsvd5 :31;
3177 uint32_t rsvd6; /* w7 */
3178 uint32_t rsvd7; /* w8 */
3179 uint32_t rsvd8; /* w9 */
3185 uint32_t allprofiles[12];
3189 uint32_t seqlenoff :16;
3190 uint32_t maxlen :16;
3192 uint32_t maxlen :16;
3193 uint32_t seqlenoff :16;
3196 uint32_t rsvd1 :28;
3197 uint32_t seqlenbcnt :4;
3199 uint32_t seqlenbcnt :4;
3200 uint32_t rsvd1 :28;
3202 uint32_t rsvd[10];
3207 uint32_t seqlenoff :16;
3208 uint32_t maxlen :16;
3210 uint32_t maxlen :16;
3211 uint32_t seqlenoff :16;
3214 uint32_t cmdcodeoff :28;
3215 uint32_t rsvd1 :12;
3216 uint32_t seqlenbcnt :4;
3218 uint32_t seqlenbcnt :4;
3219 uint32_t rsvd1 :12;
3220 uint32_t cmdcodeoff :28;
3222 uint32_t cmdmatch[8];
3224 uint32_t rsvd[2];
3229 uint32_t seqlenoff :16;
3230 uint32_t maxlen :16;
3232 uint32_t maxlen :16;
3233 uint32_t seqlenoff :16;
3236 uint32_t cmdcodeoff :28;
3237 uint32_t rsvd1 :12;
3238 uint32_t seqlenbcnt :4;
3240 uint32_t seqlenbcnt :4;
3241 uint32_t rsvd1 :12;
3242 uint32_t cmdcodeoff :28;
3244 uint32_t cmdmatch[8];
3246 uint32_t rsvd[2];
3258 uint32_t cBE : 1;
3259 uint32_t cET : 1;
3260 uint32_t cHpcb : 1;
3261 uint32_t cMA : 1;
3262 uint32_t sli_mode : 4;
3263 uint32_t pcbLen : 24; /* bit 23:0 of memory based port
3266 uint32_t pcbLen : 24; /* bit 23:0 of memory based port
3268 uint32_t sli_mode : 4;
3269 uint32_t cMA : 1;
3270 uint32_t cHpcb : 1;
3271 uint32_t cET : 1;
3272 uint32_t cBE : 1;
3275 uint32_t pcbLow; /* bit 31:0 of memory based port config block */
3276 uint32_t pcbHigh; /* bit 63:32 of memory based port config block */
3277 uint32_t hbainit[5];
3279 uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
3280 uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
3282 uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
3283 uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
3287 uint32_t rsvd1 : 19; /* Reserved */
3288 uint32_t cdss : 1; /* Configure Data Security SLI */
3289 uint32_t casabt : 1; /* Configure async abts status notice */
3290 uint32_t rsvd2 : 2; /* Reserved */
3291 uint32_t cbg : 1; /* Configure BlockGuard */
3292 uint32_t cmv : 1; /* Configure Max VPIs */
3293 uint32_t ccrp : 1; /* Config Command Ring Polling */
3294 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
3295 uint32_t chbs : 1; /* Cofigure Host Backing store */
3296 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
3297 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
3298 uint32_t cmx : 1; /* Configure Max XRIs */
3299 uint32_t cmr : 1; /* Configure Max RPIs */
3301 uint32_t cmr : 1; /* Configure Max RPIs */
3302 uint32_t cmx : 1; /* Configure Max XRIs */
3303 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
3304 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
3305 uint32_t chbs : 1; /* Cofigure Host Backing store */
3306 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
3307 uint32_t ccrp : 1; /* Config Command Ring Polling */
3308 uint32_t cmv : 1; /* Configure Max VPIs */
3309 uint32_t cbg : 1; /* Configure BlockGuard */
3310 uint32_t rsvd2 : 2; /* Reserved */
3311 uint32_t casabt : 1; /* Configure async abts status notice */
3312 uint32_t cdss : 1; /* Configure Data Security SLI */
3313 uint32_t rsvd1 : 19; /* Reserved */
3316 uint32_t rsvd3 : 19; /* Reserved */
3317 uint32_t gdss : 1; /* Configure Data Security SLI */
3318 uint32_t gasabt : 1; /* Grant async abts status notice */
3319 uint32_t rsvd4 : 2; /* Reserved */
3320 uint32_t gbg : 1; /* Grant BlockGuard */
3321 uint32_t gmv : 1; /* Grant Max VPIs */
3322 uint32_t gcrp : 1; /* Grant Command Ring Polling */
3323 uint32_t gsah : 1; /* Grant Synchronous Abort Handling */
3324 uint32_t ghbs : 1; /* Grant Host Backing Store */
3325 uint32_t ginb : 1; /* Grant Interrupt Notification Block */
3326 uint32_t gerbm : 1; /* Grant ERBM Request */
3327 uint32_t gmx : 1; /* Grant Max XRIs */
3328 uint32_t gmr : 1; /* Grant Max RPIs */
3330 uint32_t gmr : 1; /* Grant Max RPIs */
3331 uint32_t gmx : 1; /* Grant Max XRIs */
3332 uint32_t gerbm : 1; /* Grant ERBM Request */
3333 uint32_t ginb : 1; /* Grant Interrupt Notification Block */
3334 uint32_t ghbs : 1; /* Grant Host Backing Store */
3335 uint32_t gsah : 1; /* Grant Synchronous Abort Handling */
3336 uint32_t gcrp : 1; /* Grant Command Ring Polling */
3337 uint32_t gmv : 1; /* Grant Max VPIs */
3338 uint32_t gbg : 1; /* Grant BlockGuard */
3339 uint32_t rsvd4 : 2; /* Reserved */
3340 uint32_t gasabt : 1; /* Grant async abts status notice */
3341 uint32_t gdss : 1; /* Configure Data Security SLI */
3342 uint32_t rsvd3 : 19; /* Reserved */
3346 uint32_t max_rpi : 16; /* Max RPIs Port should configure */
3347 uint32_t max_xri : 16; /* Max XRIs Port should configure */
3349 uint32_t max_xri : 16; /* Max XRIs Port should configure */
3350 uint32_t max_rpi : 16; /* Max RPIs Port should configure */
3354 uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */
3355 uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */
3357 uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */
3358 uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */
3361 uint32_t rsvd6; /* Reserved */
3364 uint32_t fips_rev : 3; /* FIPS Spec Revision */
3365 uint32_t fips_level : 4; /* FIPS Level */
3366 uint32_t sec_err : 9; /* security crypto error */
3367 uint32_t max_vpi : 16; /* Max number of virt N-Ports */
3369 uint32_t max_vpi : 16; /* Max number of virt N-Ports */
3370 uint32_t sec_err : 9; /* security crypto error */
3371 uint32_t fips_level : 4; /* FIPS Level */
3372 uint32_t fips_rev : 3; /* FIPS Spec Revision */
3380 uint32_t dfltMsgNum:8; /* Default message number */
3381 uint32_t rsvd1:11; /* Reserved */
3382 uint32_t NID:5; /* Number of secondary attention IDs */
3383 uint32_t rsvd2:5; /* Reserved */
3384 uint32_t dfltPresent:1; /* Default message number present */
3385 uint32_t addFlag:1; /* Add association flag */
3386 uint32_t reportFlag:1; /* Report association flag */
3388 uint32_t reportFlag:1; /* Report association flag */
3389 uint32_t addFlag:1; /* Add association flag */
3390 uint32_t dfltPresent:1; /* Default message number present */
3391 uint32_t rsvd2:5; /* Reserved */
3392 uint32_t NID:5; /* Number of secondary attention IDs */
3393 uint32_t rsvd1:11; /* Reserved */
3394 uint32_t dfltMsgNum:8; /* Default message number */
3396 uint32_t attentionConditions[2];
3400 uint32_t autoClearHA[2];
3402 uint32_t rsvd3:16;
3403 uint32_t autoClearID:16;
3405 uint32_t autoClearID:16;
3406 uint32_t rsvd3:16;
3408 uint32_t rsvd4;
3417 uint32_t cmdEntries;
3418 uint32_t cmdAddrLow;
3419 uint32_t cmdAddrHigh;
3421 uint32_t rspEntries;
3422 uint32_t rspAddrLow;
3423 uint32_t rspAddrHigh;
3428 uint32_t type:8;
3430 uint32_t feature:8;
3432 uint32_t rsvd:12;
3433 uint32_t maxRing:4;
3435 uint32_t maxRing:4;
3436 uint32_t rsvd:12;
3437 uint32_t feature:8;
3439 uint32_t type:8;
3443 uint32_t mailBoxSize;
3444 uint32_t mbAddrLow;
3445 uint32_t mbAddrHigh;
3447 uint32_t hgpAddrLow;
3448 uint32_t hgpAddrHigh;
3450 uint32_t pgpAddrLow;
3451 uint32_t pgpAddrHigh;
3458 uint32_t rsvd0:27;
3459 uint32_t discardFarp:1;
3460 uint32_t IPEnable:1;
3461 uint32_t nodeName:1;
3462 uint32_t portName:1;
3463 uint32_t filterEnable:1;
3465 uint32_t filterEnable:1;
3466 uint32_t portName:1;
3467 uint32_t nodeName:1;
3468 uint32_t IPEnable:1;
3469 uint32_t discardFarp:1;
3470 uint32_t rsvd:27;
3475 uint32_t rsvd1;
3476 uint32_t rsvd2;
3477 uint32_t rsvd3;
3478 uint32_t IPAddress;
3485 uint32_t rsvd:30;
3486 uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
3488 uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
3489 uint32_t rsvd:30;
3495 #define MAILBOX_CMD_SIZE (MAILBOX_CMD_WSIZE * sizeof(uint32_t))
3498 #define MAILBOX_EXT_SIZE (MAILBOX_EXT_WSIZE * sizeof(uint32_t))
3504 uint32_t varWords[MAILBOX_CMD_WSIZE - 1]; /* first word is type/
3561 uint32_t unused1[16];
3568 uint32_t reserved[8];
3569 uint32_t hbq_put[16];
3574 uint32_t hbq_get[16];
3725 uint32_t reserved;
3730 uint32_t reserved[4];
3737 uint32_t xrsqRo; /* Starting Relative Offset */
3747 uint32_t word4Rsvd:7;
3748 uint32_t fl:1;
3749 uint32_t myID:24;
3750 uint32_t word5Rsvd:8;
3751 uint32_t remoteID:24;
3753 uint32_t myID:24;
3754 uint32_t fl:1;
3755 uint32_t word4Rsvd:7;
3756 uint32_t remoteID:24;
3757 uint32_t word5Rsvd:8;
3764 uint32_t parmRo;
3767 uint32_t word5Rsvd:8;
3768 uint32_t remoteID:24;
3770 uint32_t remoteID:24;
3771 uint32_t word5Rsvd:8;
3777 uint32_t rsvd[3];
3778 uint32_t abortType;
3781 uint32_t parm;
3793 uint32_t rsvd[3];
3794 uint32_t abortType;
3795 uint32_t parm;
3796 uint32_t iotag32;
3801 uint32_t rsvd[4];
3802 uint32_t parmRo;
3804 uint32_t word5Rsvd:8;
3805 uint32_t remoteID:24;
3807 uint32_t remoteID:24;
3808 uint32_t word5Rsvd:8;
3816 uint32_t fcpi_parm;
3817 uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
3823 uint32_t fcpt_Offset;
3824 uint32_t fcpt_Length; /* transfer ready for IWRITE */
3832 uint32_t xrsqRo; /* Starting Relative Offset */
3842 uint32_t rsvd1;
3843 uint32_t xrsqRo; /* Starting Relative Offset */
3851 uint32_t word4Rsvd:7;
3852 uint32_t fl:1;
3853 uint32_t myID:24;
3854 uint32_t word5Rsvd:8;
3855 uint32_t remoteID:24;
3857 uint32_t myID:24;
3858 uint32_t fl:1;
3859 uint32_t word4Rsvd:7;
3860 uint32_t remoteID:24;
3861 uint32_t word5Rsvd:8;
3868 uint32_t xrsqRo; /* Starting Relative Offset */
3875 uint32_t rcvd1;
3876 uint32_t parmRo;
3879 uint32_t word5Rsvd:8;
3880 uint32_t remoteID:24;
3882 uint32_t remoteID:24;
3883 uint32_t word5Rsvd:8;
3890 uint32_t hbq_1;
3891 uint32_t parmRo;
3893 uint32_t rctl:8;
3894 uint32_t type:8;
3895 uint32_t dfctl:8;
3896 uint32_t ls:1;
3897 uint32_t fs:1;
3898 uint32_t rsvd2:3;
3899 uint32_t si:1;
3900 uint32_t bc:1;
3901 uint32_t rsvd3:1;
3903 uint32_t rsvd3:1;
3904 uint32_t bc:1;
3905 uint32_t si:1;
3906 uint32_t rsvd2:3;
3907 uint32_t fs:1;
3908 uint32_t ls:1;
3909 uint32_t dfctl:8;
3910 uint32_t type:8;
3911 uint32_t rctl:8;
3918 uint32_t fcpi_parm;
3919 uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
3925 uint32_t fcpt_Offset;
3926 uint32_t fcpt_Length; /* transfer ready for IWRITE */
3931 uint32_t rsvd[4];
3932 uint32_t param;
3962 uint32_t word10Rsvd;
3963 uint32_t acc_len; /* accumulated length */
3970 uint32_t buffer_tag;
3976 uint32_t rsvd;
3977 uint32_t rsvd1;
3981 uint32_t iotag64_low;
3982 uint32_t iotag64_high;
3983 uint32_t ebde_count;
3984 uint32_t rsvd;
3989 uint32_t filler[6]; /* word 8-13 in IOCB */
3990 uint32_t bghm; /* word 14 - BlockGuard High Water Mark */
4010 uint32_t bgstat; /* word 15 - BlockGuard Status */
4013 static inline uint32_t
4014 lpfc_bgs_get_bidir_bg_prof(uint32_t bgstat) in lpfc_bgs_get_bidir_bg_prof()
4020 static inline uint32_t
4021 lpfc_bgs_get_bidir_err_cond(uint32_t bgstat) in lpfc_bgs_get_bidir_err_cond()
4027 static inline uint32_t
4028 lpfc_bgs_get_bg_prof(uint32_t bgstat) in lpfc_bgs_get_bg_prof()
4034 static inline uint32_t
4035 lpfc_bgs_get_invalid_prof(uint32_t bgstat) in lpfc_bgs_get_invalid_prof()
4041 static inline uint32_t
4042 lpfc_bgs_get_uninit_dif_block(uint32_t bgstat) in lpfc_bgs_get_uninit_dif_block()
4048 static inline uint32_t
4049 lpfc_bgs_get_hi_water_mark_present(uint32_t bgstat) in lpfc_bgs_get_hi_water_mark_present()
4055 static inline uint32_t
4056 lpfc_bgs_get_reftag_err(uint32_t bgstat) in lpfc_bgs_get_reftag_err()
4062 static inline uint32_t
4063 lpfc_bgs_get_apptag_err(uint32_t bgstat) in lpfc_bgs_get_apptag_err()
4069 static inline uint32_t
4070 lpfc_bgs_get_guard_err(uint32_t bgstat) in lpfc_bgs_get_guard_err()
4078 uint32_t io_tag64_low;
4079 uint32_t io_tag64_high;
4091 uint32_t reserved4;
4123 uint32_t ulpWord[IOCB_WORD_SZ - 2]; /* generic 6 'words' */
4152 uint32_t ulpTimeout:8;
4153 uint32_t ulpXS:1;
4154 uint32_t ulpFCP2Rcvy:1;
4155 uint32_t ulpPU:2;
4156 uint32_t ulpIr:1;
4157 uint32_t ulpClass:3;
4158 uint32_t ulpCommand:8;
4159 uint32_t ulpStatus:4;
4160 uint32_t ulpBdeCount:2;
4161 uint32_t ulpLe:1;
4162 uint32_t ulpOwner:1; /* Low order bit word 7 */
4164 uint32_t ulpOwner:1; /* Low order bit word 7 */
4165 uint32_t ulpLe:1;
4166 uint32_t ulpBdeCount:2;
4167 uint32_t ulpStatus:4;
4168 uint32_t ulpCommand:8;
4169 uint32_t ulpClass:3;
4170 uint32_t ulpIr:1;
4171 uint32_t ulpPU:2;
4172 uint32_t ulpFCP2Rcvy:1;
4173 uint32_t ulpXS:1;
4174 uint32_t ulpTimeout:8;
4183 uint32_t sli3Words[24]; /* 96 extra bytes for SLI-3 */
4237 sizeof(uint32_t) * MAILBOX_EXT_WSIZE))
4245 uint32_t mbx_ext_words[MAILBOX_EXT_WSIZE];