740 	volatile u32 int_reg;  in ipr_mask_and_clear_interrupts()  local
760 	int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);  in ipr_mask_and_clear_interrupts()
5497 	u32 ioasc, int_reg;  in ipr_cancel_op()  local
5520 	int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);  in ipr_cancel_op()
5628 					      u32 int_reg)  in ipr_handle_other_interrupt()  argument
5634 	int_reg &= ~int_mask_reg;  in ipr_handle_other_interrupt()
5639 	if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) {  in ipr_handle_other_interrupt()
5642 			int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;  in ipr_handle_other_interrupt()
5643 			if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {  in ipr_handle_other_interrupt()
5647 				int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;  in ipr_handle_other_interrupt()
5658 	if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {  in ipr_handle_other_interrupt()
5661 		int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);  in ipr_handle_other_interrupt()
5666 	} else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) {  in ipr_handle_other_interrupt()
5670 					"Spurious interrupt detected. 0x%08X\n", int_reg);  in ipr_handle_other_interrupt()
5672 			int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_handle_other_interrupt()
5676 		if (int_reg & IPR_PCII_IOA_UNIT_CHECKED)  in ipr_handle_other_interrupt()
5678 		else if (int_reg & IPR_PCII_NO_HOST_RRQ)  in ipr_handle_other_interrupt()
5680 				"No Host RRQ. 0x%08X\n", int_reg);  in ipr_handle_other_interrupt()
5683 				"Permanent IOA failure. 0x%08X\n", int_reg);  in ipr_handle_other_interrupt()
5804 	u32 int_reg = 0;  in ipr_isr()  local
5830 				int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_isr()
5831 			} while (int_reg & IPR_PCII_HRRQ_UPDATED &&  in ipr_isr()
5835 			int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_isr()
5838 			   int_reg & IPR_PCII_HRRQ_UPDATED) {  in ipr_isr()
5848 		rc = ipr_handle_other_interrupt(ioa_cfg, int_reg);  in ipr_isr()
8363 	volatile u32 int_reg;  in ipr_reset_next_stage()  local
8383 		int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_next_stage()
8387 		int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_reset_next_stage()
8388 		if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {  in ipr_reset_next_stage()
8393 			int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_next_stage()
8421 	volatile u32 int_reg;  in ipr_reset_enable_ioa()  local
8437 		int_reg = readl(ioa_cfg->regs.endian_swap_reg);  in ipr_reset_enable_ioa()
8440 	int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_reset_enable_ioa()
8442 	if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {  in ipr_reset_enable_ioa()
8445 		int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_enable_ioa()
8459 	int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_enable_ioa()
8658 	u32 int_reg;  in ipr_reset_restore_cfg_space()  local
8674 		int_reg = readl(ioa_cfg->regs.endian_swap_reg);  in ipr_reset_restore_cfg_space()
10096 	volatile u32 int_reg;  in ipr_test_msi()  local
10107 	int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_test_msi()
10118 	int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);  in ipr_test_msi()