Lines Matching refs:host_int_status

308 		writel(0, &acb->pmuE->host_int_status); /*clear interrupt*/  in arcmsr_remap_pciregion()
463 			writel(0, &phbcmu->host_int_status); /*clear interrupt*/  in arcmsr_hbaE_wait_msgint_ready()
612 	reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS);  in arcmsr_hbaD_assign_regAddr()
1126 		writel(0, &acb->pmuE->host_int_status);  in arcmsr_resume()
1463 …while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < acb->maxOuts…  in arcmsr_done4abort_postqueue()
2346 		writel(0, &reg->host_int_status); /* clear interrupt */  in arcmsr_hbaE_doorbell_isr()
2575 	writel(0, &reg->host_int_status);  in arcmsr_hbaE_message_isr()
2641 	host_interrupt_status = readl(&phbcmu->host_int_status) &  in arcmsr_hbaC_handle_isr()
2652 		host_interrupt_status = readl(&phbcmu->host_int_status);  in arcmsr_hbaC_handle_isr()
2663 	host_interrupt_status = readl(pmu->host_int_status) &  in arcmsr_hbaD_handle_isr()
2676 		host_interrupt_status = readl(pmu->host_int_status);  in arcmsr_hbaD_handle_isr()
2688 	host_interrupt_status = readl(&pmu->host_int_status) &  in arcmsr_hbaE_handle_isr()
2702 		host_interrupt_status = readl(&pmu->host_int_status);  in arcmsr_hbaE_handle_isr()
3450 		if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {  in arcmsr_hbaC_polling_ccbdone()
4184 		writel(0, &reg->host_int_status); /*clear interrupt*/  in arcmsr_clear_doorbell_queue_buffer()
4192 				writel(0, &reg->host_int_status); /*clear interrupt*/  in arcmsr_clear_doorbell_queue_buffer()