56 	struct rtc_device *rtc;  member
69 static inline uint32_t jz4740_rtc_reg_read(struct jz4740_rtc *rtc, size_t reg)  in jz4740_rtc_reg_read()  argument
71 	return readl(rtc->base + reg);  in jz4740_rtc_reg_read()
74 static int jz4740_rtc_wait_write_ready(struct jz4740_rtc *rtc)  in jz4740_rtc_wait_write_ready()  argument
80 		ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL);  in jz4740_rtc_wait_write_ready()
86 static inline int jz4780_rtc_enable_write(struct jz4740_rtc *rtc)  in jz4780_rtc_enable_write()  argument
91 	ret = jz4740_rtc_wait_write_ready(rtc);  in jz4780_rtc_enable_write()
95 	writel(JZ_RTC_WENR_MAGIC, rtc->base + JZ_REG_RTC_WENR);  in jz4780_rtc_enable_write()
98 		ctrl = readl(rtc->base + JZ_REG_RTC_WENR);  in jz4780_rtc_enable_write()
104 static inline int jz4740_rtc_reg_write(struct jz4740_rtc *rtc, size_t reg,  in jz4740_rtc_reg_write()  argument
109 	if (rtc->type >= ID_JZ4780)  in jz4740_rtc_reg_write()
110 		ret = jz4780_rtc_enable_write(rtc);  in jz4740_rtc_reg_write()
112 		ret = jz4740_rtc_wait_write_ready(rtc);  in jz4740_rtc_reg_write()
114 		writel(val, rtc->base + reg);  in jz4740_rtc_reg_write()
119 static int jz4740_rtc_ctrl_set_bits(struct jz4740_rtc *rtc, uint32_t mask,  in jz4740_rtc_ctrl_set_bits()  argument
126 	spin_lock_irqsave(&rtc->lock, flags);  in jz4740_rtc_ctrl_set_bits()
128 	ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL);  in jz4740_rtc_ctrl_set_bits()
138 	ret = jz4740_rtc_reg_write(rtc, JZ_REG_RTC_CTRL, ctrl);  in jz4740_rtc_ctrl_set_bits()
140 	spin_unlock_irqrestore(&rtc->lock, flags);  in jz4740_rtc_ctrl_set_bits()
147 	struct jz4740_rtc *rtc = dev_get_drvdata(dev);  in jz4740_rtc_read_time()  local
151 	if (jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SCRATCHPAD) != 0x12345678)  in jz4740_rtc_read_time()
158 	secs = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC);  in jz4740_rtc_read_time()
159 	secs2 = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC);  in jz4740_rtc_read_time()
163 		secs2 = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC);  in jz4740_rtc_read_time()
176 	struct jz4740_rtc *rtc = dev_get_drvdata(dev);  in jz4740_rtc_set_time()  local
179 	ret = jz4740_rtc_reg_write(rtc, JZ_REG_RTC_SEC, rtc_tm_to_time64(time));  in jz4740_rtc_set_time()
183 	return jz4740_rtc_reg_write(rtc, JZ_REG_RTC_SCRATCHPAD, 0x12345678);  in jz4740_rtc_set_time()
188 	struct jz4740_rtc *rtc = dev_get_drvdata(dev);  in jz4740_rtc_read_alarm()  local
192 	secs = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC_ALARM);  in jz4740_rtc_read_alarm()
194 	ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL);  in jz4740_rtc_read_alarm()
207 	struct jz4740_rtc *rtc = dev_get_drvdata(dev);  in jz4740_rtc_set_alarm()  local
210 	ret = jz4740_rtc_reg_write(rtc, JZ_REG_RTC_SEC_ALARM, secs);  in jz4740_rtc_set_alarm()
212 		ret = jz4740_rtc_ctrl_set_bits(rtc,  in jz4740_rtc_set_alarm()
220 	struct jz4740_rtc *rtc = dev_get_drvdata(dev);  in jz4740_rtc_alarm_irq_enable()  local
221 	return jz4740_rtc_ctrl_set_bits(rtc, JZ_RTC_CTRL_AF_IRQ, enable);  in jz4740_rtc_alarm_irq_enable()
234 	struct jz4740_rtc *rtc = data;  in jz4740_rtc_irq()  local
238 	ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL);  in jz4740_rtc_irq()
246 	rtc_update_irq(rtc->rtc, 1, events);  in jz4740_rtc_irq()
248 	jz4740_rtc_ctrl_set_bits(rtc, JZ_RTC_CTRL_1HZ | JZ_RTC_CTRL_AF, false);  in jz4740_rtc_irq()
255 	struct jz4740_rtc *rtc = dev_get_drvdata(dev);  in jz4740_rtc_poweroff()  local
256 	jz4740_rtc_reg_write(rtc, JZ_REG_RTC_HIBERNATE, 1);  in jz4740_rtc_poweroff()
261 	struct jz4740_rtc *rtc = dev_get_drvdata(dev_for_power_off);  in jz4740_rtc_power_off()  local
266 	clk_prepare_enable(rtc->clk);  in jz4740_rtc_power_off()
268 	rtc_rate = clk_get_rate(rtc->clk);  in jz4740_rtc_power_off()
275 		(rtc->min_wakeup_pin_assert_time * rtc_rate) / 1000;  in jz4740_rtc_power_off()
280 	jz4740_rtc_reg_write(rtc,  in jz4740_rtc_power_off()
287 	reset_counter_ticks = (rtc->reset_pin_assert_time * rtc_rate) / 1000;  in jz4740_rtc_power_off()
292 	jz4740_rtc_reg_write(rtc,  in jz4740_rtc_power_off()
309 	struct jz4740_rtc *rtc;  in jz4740_rtc_probe()  local
316 	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);  in jz4740_rtc_probe()
317 	if (!rtc)  in jz4740_rtc_probe()
321 		rtc->type = (enum jz4740_rtc_type)of_id->data;  in jz4740_rtc_probe()
323 		rtc->type = id->driver_data;  in jz4740_rtc_probe()
325 	rtc->irq = platform_get_irq(pdev, 0);  in jz4740_rtc_probe()
326 	if (rtc->irq < 0)  in jz4740_rtc_probe()
330 	rtc->base = devm_ioremap_resource(&pdev->dev, mem);  in jz4740_rtc_probe()
331 	if (IS_ERR(rtc->base))  in jz4740_rtc_probe()
332 		return PTR_ERR(rtc->base);  in jz4740_rtc_probe()
334 	rtc->clk = devm_clk_get(&pdev->dev, "rtc");  in jz4740_rtc_probe()
335 	if (IS_ERR(rtc->clk)) {  in jz4740_rtc_probe()
337 		return PTR_ERR(rtc->clk);  in jz4740_rtc_probe()
340 	spin_lock_init(&rtc->lock);  in jz4740_rtc_probe()
342 	platform_set_drvdata(pdev, rtc);  in jz4740_rtc_probe()
346 	ret = dev_pm_set_wake_irq(&pdev->dev, rtc->irq);  in jz4740_rtc_probe()
352 	rtc->rtc = devm_rtc_allocate_device(&pdev->dev);  in jz4740_rtc_probe()
353 	if (IS_ERR(rtc->rtc)) {  in jz4740_rtc_probe()
354 		ret = PTR_ERR(rtc->rtc);  in jz4740_rtc_probe()
359 	rtc->rtc->ops = &jz4740_rtc_ops;  in jz4740_rtc_probe()
360 	rtc->rtc->range_max = U32_MAX;  in jz4740_rtc_probe()
362 	ret = rtc_register_device(rtc->rtc);  in jz4740_rtc_probe()
366 	ret = devm_request_irq(&pdev->dev, rtc->irq, jz4740_rtc_irq, 0,  in jz4740_rtc_probe()
367 				pdev->name, rtc);  in jz4740_rtc_probe()
376 			rtc->reset_pin_assert_time = 60;  in jz4740_rtc_probe()
378 					     &rtc->reset_pin_assert_time);  in jz4740_rtc_probe()
381 			rtc->min_wakeup_pin_assert_time = 100;  in jz4740_rtc_probe()
384 					     &rtc->min_wakeup_pin_assert_time);  in jz4740_rtc_probe()