Lines Matching refs:div
73 u64 div, tmp; in rcar_pwm_get_clock_division() local
78 div = (u64)NSEC_PER_SEC * RCAR_PWM_MAX_CYCLE; in rcar_pwm_get_clock_division()
79 tmp = (u64)period_ns * clk_rate + div - 1; in rcar_pwm_get_clock_division()
80 tmp = div64_u64(tmp, div); in rcar_pwm_get_clock_division()
81 div = ilog2(tmp - 1) + 1; in rcar_pwm_get_clock_division()
83 return (div <= RCAR_PWM_MAX_DIVISION) ? div : -ERANGE; in rcar_pwm_get_clock_division()
87 unsigned int div) in rcar_pwm_set_clock_control() argument
94 if (div & 1) in rcar_pwm_set_clock_control()
97 div >>= 1; in rcar_pwm_set_clock_control()
99 value |= div << RCAR_PWMCR_CC0_SHIFT; in rcar_pwm_set_clock_control()
103 static int rcar_pwm_set_counter(struct rcar_pwm_chip *rp, int div, int duty_ns, in rcar_pwm_set_counter() argument
110 one_cycle = (unsigned long long)NSEC_PER_SEC * 100ULL * (1 << div); in rcar_pwm_set_counter()
165 int div, ret; in rcar_pwm_apply() local
177 div = rcar_pwm_get_clock_division(rp, state->period); in rcar_pwm_apply()
178 if (div < 0) in rcar_pwm_apply()
179 return div; in rcar_pwm_apply()
183 ret = rcar_pwm_set_counter(rp, div, state->duty_cycle, state->period); in rcar_pwm_apply()
185 rcar_pwm_set_clock_control(rp, div); in rcar_pwm_apply()