Lines Matching refs:rpl

204 		if (rd->rpl[i].name)  in find_nr_power_limit()
301 if ((rd->rpl[i].name) && j++ == cid) { in contraint_to_pl()
336 switch (rd->rpl[id].prim_id) { in set_power_limit()
370 switch (rd->rpl[id].prim_id) { in get_current_power_limit()
407 switch (rd->rpl[id].prim_id) { in set_time_window()
439 switch (rd->rpl[id].prim_id) { in get_time_window()
468 return rd->rpl[id].name; in get_constraint_name()
482 switch (rd->rpl[id].prim_id) { in get_max_power()
528 rd->rpl[0].prim_id = PL1_ENABLE; in rapl_init_domains()
529 rd->rpl[0].name = pl1_name; in rapl_init_domains()
532 rd->rpl[1].prim_id = PL2_ENABLE; in rapl_init_domains()
533 rd->rpl[1].name = pl2_name; in rapl_init_domains()
1114 rd->rpl[0].prim_id = PL1_ENABLE; in rapl_add_platform_domain()
1115 rd->rpl[0].name = pl1_name; in rapl_add_platform_domain()
1116 rd->rpl[1].prim_id = PL2_ENABLE; in rapl_add_platform_domain()
1117 rd->rpl[1].name = pl2_name; in rapl_add_platform_domain()
1199 int prim = rd->rpl[i].prim_id; in rapl_detect_powerlimit()
1202 rd->rpl[i].name = NULL; in rapl_detect_powerlimit()
1344 switch (rd->rpl[i].prim_id) { in power_limit_state_save()
1348 &rd->rpl[i].last_power_limit); in power_limit_state_save()
1350 rd->rpl[i].last_power_limit = 0; in power_limit_state_save()
1355 &rd->rpl[i].last_power_limit); in power_limit_state_save()
1357 rd->rpl[i].last_power_limit = 0; in power_limit_state_save()
1378 switch (rd->rpl[i].prim_id) { in power_limit_state_restore()
1380 if (rd->rpl[i].last_power_limit) in power_limit_state_restore()
1382 rd->rpl[i].last_power_limit); in power_limit_state_restore()
1385 if (rd->rpl[i].last_power_limit) in power_limit_state_restore()
1387 rd->rpl[i].last_power_limit); in power_limit_state_restore()