143 } ipcdev;  variable
169 	ipcdev.cmd = cmd;  in ipc_send_command()
170 	if (ipcdev.irq_mode) {  in ipc_send_command()
171 		reinit_completion(&ipcdev.cmd_complete);  in ipc_send_command()
174 	writel(cmd, ipcdev.ipc_base + IPC_CMD);  in ipc_send_command()
179 	return readl(ipcdev.ipc_base + IPC_STATUS);  in ipc_read_status()
184 	writel(data, ipcdev.ipc_base + IPC_WRITE_BUFFER + offset);  in ipc_data_writel()
189 	return readb(ipcdev.ipc_base + IPC_READ_BUFFER + offset);  in ipc_data_readb()
194 	return readl(ipcdev.ipc_base + IPC_READ_BUFFER + offset);  in ipc_data_readl()
199 	return readq(ipcdev.gcr_mem_base + offset);  in gcr_data_readq()
204 	if (!ipcdev.has_gcr_regs)  in is_gcr_valid()
226 	spin_lock(&ipcdev.gcr_lock);  in intel_pmc_gcr_read()
230 		spin_unlock(&ipcdev.gcr_lock);  in intel_pmc_gcr_read()
234 	*data = readl(ipcdev.gcr_mem_base + offset);  in intel_pmc_gcr_read()
236 	spin_unlock(&ipcdev.gcr_lock);  in intel_pmc_gcr_read()
255 	spin_lock(&ipcdev.gcr_lock);  in intel_pmc_gcr_read64()
259 		spin_unlock(&ipcdev.gcr_lock);  in intel_pmc_gcr_read64()
263 	*data = readq(ipcdev.gcr_mem_base + offset);  in intel_pmc_gcr_read64()
265 	spin_unlock(&ipcdev.gcr_lock);  in intel_pmc_gcr_read64()
285 	spin_lock(&ipcdev.gcr_lock);  in intel_pmc_gcr_write()
289 		spin_unlock(&ipcdev.gcr_lock);  in intel_pmc_gcr_write()
293 	writel(data, ipcdev.gcr_mem_base + offset);  in intel_pmc_gcr_write()
295 	spin_unlock(&ipcdev.gcr_lock);  in intel_pmc_gcr_write()
317 	spin_lock(&ipcdev.gcr_lock);  in intel_pmc_gcr_update()
323 	new_val = readl(ipcdev.gcr_mem_base + offset);  in intel_pmc_gcr_update()
328 	writel(new_val, ipcdev.gcr_mem_base + offset);  in intel_pmc_gcr_update()
330 	new_val = readl(ipcdev.gcr_mem_base + offset);  in intel_pmc_gcr_update()
339 	spin_unlock(&ipcdev.gcr_lock);  in intel_pmc_gcr_update()
357 	if (ipcdev.irq_mode) {  in intel_pmc_ipc_check_status()
359 				&ipcdev.cmd_complete, IPC_MAX_SEC * HZ))  in intel_pmc_ipc_check_status()
372 		dev_err(ipcdev.dev,  in intel_pmc_ipc_check_status()
374 			status, ipcdev.cmd);  in intel_pmc_ipc_check_status()
384 			dev_err(ipcdev.dev,  in intel_pmc_ipc_check_status()
386 				ipc_err_sources[i], status, ipcdev.cmd);  in intel_pmc_ipc_check_status()
388 			dev_err(ipcdev.dev,  in intel_pmc_ipc_check_status()
390 				status, ipcdev.cmd);  in intel_pmc_ipc_check_status()
413 	if (ipcdev.dev == NULL) {  in intel_pmc_ipc_simple_command()
451 	if (ipcdev.dev == NULL) {  in intel_pmc_ipc_raw_cmd()
456 	writel(dptr, ipcdev.ipc_base + IPC_DPTR);  in intel_pmc_ipc_raw_cmd()
457 	writel(sptr, ipcdev.ipc_base + IPC_SPTR);  in intel_pmc_ipc_raw_cmd()
499 	if (ipcdev.irq_mode) {  in ioc()
501 		writel(status | IPC_STATUS_IRQ, ipcdev.ipc_base + IPC_STATUS);  in ioc()
503 	complete(&ipcdev.cmd_complete);  in ioc()
510 	struct intel_pmc_ipc_dev *pmc = &ipcdev;  in ipc_pci_probe()
519 	spin_lock_init(&ipcdev.gcr_lock);  in ipc_pci_probe()
662 	.no_reboot_priv = &ipcdev,
682 		.parent = ipcdev.dev,  in ipc_create_punit_device()
686 		.num_res = ipcdev.punit_res_count,  in ipc_create_punit_device()
693 	ipcdev.punit_dev = pdev;  in ipc_create_punit_device()
703 		.parent = ipcdev.dev,  in ipc_create_tco_device()
713 	res->start = ipcdev.acpi_io_base + TCO_BASE_OFFSET;  in ipc_create_tco_device()
717 	res->start = ipcdev.acpi_io_base + SMI_EN_OFFSET;  in ipc_create_tco_device()
724 	ipcdev.tco_dev = pdev;  in ipc_create_tco_device()
734 		.parent = ipcdev.dev,  in ipc_create_telemetry_device()
742 	res->start = ipcdev.telem_punit_ssram_base;  in ipc_create_telemetry_device()
743 	res->end = res->start + ipcdev.telem_punit_ssram_size - 1;  in ipc_create_telemetry_device()
746 	res->start = ipcdev.telem_pmc_ssram_base;  in ipc_create_telemetry_device()
747 	res->end = res->start + ipcdev.telem_pmc_ssram_size - 1;  in ipc_create_telemetry_device()
753 	ipcdev.telemetry_dev = pdev;  in ipc_create_telemetry_device()
766 			dev_err(ipcdev.dev, "Failed to add tco platform device\n");  in ipc_create_pmc_devices()
773 		dev_err(ipcdev.dev, "Failed to add punit platform device\n");  in ipc_create_pmc_devices()
774 		platform_device_unregister(ipcdev.tco_dev);  in ipc_create_pmc_devices()
778 	if (!ipcdev.telem_res_inval) {  in ipc_create_pmc_devices()
781 			dev_warn(ipcdev.dev,  in ipc_create_pmc_devices()
783 			platform_device_unregister(ipcdev.punit_dev);  in ipc_create_pmc_devices()
784 			platform_device_unregister(ipcdev.tco_dev);  in ipc_create_pmc_devices()
804 	ipcdev.acpi_io_base = res->start;  in ipc_plat_get_res()
805 	ipcdev.acpi_io_size = size;  in ipc_plat_get_res()
808 	ipcdev.punit_res_count = 0;  in ipc_plat_get_res()
817 	punit_res[ipcdev.punit_res_count++] = *res;  in ipc_plat_get_res()
827 	punit_res[ipcdev.punit_res_count++] = *res;  in ipc_plat_get_res()
834 		punit_res[ipcdev.punit_res_count++] = *res;  in ipc_plat_get_res()
842 		punit_res[ipcdev.punit_res_count++] = *res;  in ipc_plat_get_res()
850 		punit_res[ipcdev.punit_res_count++] = *res;  in ipc_plat_get_res()
858 		punit_res[ipcdev.punit_res_count++] = *res;  in ipc_plat_get_res()
875 	ipcdev.ipc_base = addr;  in ipc_plat_get_res()
877 	ipcdev.gcr_mem_base = addr + PLAT_RESOURCE_GCR_OFFSET;  in ipc_plat_get_res()
880 	ipcdev.telem_res_inval = 0;  in ipc_plat_get_res()
885 		ipcdev.telem_res_inval = 1;  in ipc_plat_get_res()
887 		ipcdev.telem_punit_ssram_base = res->start +  in ipc_plat_get_res()
889 		ipcdev.telem_punit_ssram_size = TELEM_SSRAM_SIZE;  in ipc_plat_get_res()
890 		ipcdev.telem_pmc_ssram_base = res->start +  in ipc_plat_get_res()
892 		ipcdev.telem_pmc_ssram_size = TELEM_SSRAM_SIZE;  in ipc_plat_get_res()
909 	if (!ipcdev.has_gcr_regs)  in intel_pmc_s0ix_counter_read()
933 	ipcdev.dev = &pdev->dev;  in ipc_plat_probe()
934 	ipcdev.irq_mode = IPC_TRIGGER_MODE_IRQ;  in ipc_plat_probe()
935 	init_completion(&ipcdev.cmd_complete);  in ipc_plat_probe()
936 	spin_lock_init(&ipcdev.gcr_lock);  in ipc_plat_probe()
938 	ipcdev.irq = platform_get_irq(pdev, 0);  in ipc_plat_probe()
939 	if (ipcdev.irq < 0)  in ipc_plat_probe()
954 	if (devm_request_irq(&pdev->dev, ipcdev.irq, ioc, IRQF_NO_SUSPEND,  in ipc_plat_probe()
955 			     "intel_pmc_ipc", &ipcdev)) {  in ipc_plat_probe()
968 	ipcdev.has_gcr_regs = true;  in ipc_plat_probe()
972 	devm_free_irq(&pdev->dev, ipcdev.irq, &ipcdev);  in ipc_plat_probe()
974 	platform_device_unregister(ipcdev.tco_dev);  in ipc_plat_probe()
975 	platform_device_unregister(ipcdev.punit_dev);  in ipc_plat_probe()
976 	platform_device_unregister(ipcdev.telemetry_dev);  in ipc_plat_probe()
984 	devm_free_irq(&pdev->dev, ipcdev.irq, &ipcdev);  in ipc_plat_remove()
985 	platform_device_unregister(ipcdev.tco_dev);  in ipc_plat_remove()
986 	platform_device_unregister(ipcdev.punit_dev);  in ipc_plat_remove()
987 	platform_device_unregister(ipcdev.telemetry_dev);  in ipc_plat_remove()
988 	ipcdev.dev = NULL;  in ipc_plat_remove()