410 sirfsoc_gpio_to_bank(struct sirfsoc_gpio_chip *sgpio, unsigned int offset)  in sirfsoc_gpio_to_bank()  argument
412 	return &sgpio->sgpio_bank[offset / SIRFSOC_GPIO_BANK_SIZE];  in sirfsoc_gpio_to_bank()
423 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(gc);  in sirfsoc_gpio_irq_ack()  local
424 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);  in sirfsoc_gpio_irq_ack()
431 	spin_lock_irqsave(&sgpio->lock, flags);  in sirfsoc_gpio_irq_ack()
433 	val = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_ack()
435 	writel(val, sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_ack()
437 	spin_unlock_irqrestore(&sgpio->lock, flags);  in sirfsoc_gpio_irq_ack()
440 static void __sirfsoc_gpio_irq_mask(struct sirfsoc_gpio_chip *sgpio,  in __sirfsoc_gpio_irq_mask()  argument
449 	spin_lock_irqsave(&sgpio->lock, flags);  in __sirfsoc_gpio_irq_mask()
451 	val = readl(sgpio->chip.regs + offset);  in __sirfsoc_gpio_irq_mask()
454 	writel(val, sgpio->chip.regs + offset);  in __sirfsoc_gpio_irq_mask()
456 	spin_unlock_irqrestore(&sgpio->lock, flags);  in __sirfsoc_gpio_irq_mask()
462 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(gc);  in sirfsoc_gpio_irq_mask()  local
463 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);  in sirfsoc_gpio_irq_mask()
465 	__sirfsoc_gpio_irq_mask(sgpio, bank, d->hwirq % SIRFSOC_GPIO_BANK_SIZE);  in sirfsoc_gpio_irq_mask()
471 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(gc);  in sirfsoc_gpio_irq_unmask()  local
472 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);  in sirfsoc_gpio_irq_unmask()
479 	spin_lock_irqsave(&sgpio->lock, flags);  in sirfsoc_gpio_irq_unmask()
481 	val = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_unmask()
484 	writel(val, sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_unmask()
486 	spin_unlock_irqrestore(&sgpio->lock, flags);  in sirfsoc_gpio_irq_unmask()
492 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(gc);  in sirfsoc_gpio_irq_type()  local
493 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);  in sirfsoc_gpio_irq_type()
500 	spin_lock_irqsave(&sgpio->lock, flags);  in sirfsoc_gpio_irq_type()
502 	val = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_type()
535 	writel(val, sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_type()
537 	spin_unlock_irqrestore(&sgpio->lock, flags);  in sirfsoc_gpio_irq_type()
554 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(gc);  in sirfsoc_gpio_handle_irq()  local
562 		bank = &sgpio->sgpio_bank[i];  in sirfsoc_gpio_handle_irq()
570 	status = readl(sgpio->chip.regs + SIRFSOC_GPIO_INT_STATUS(bank->id));  in sirfsoc_gpio_handle_irq()
580 		ctrl = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, idx));  in sirfsoc_gpio_handle_irq()
600 static inline void sirfsoc_gpio_set_input(struct sirfsoc_gpio_chip *sgpio,  in sirfsoc_gpio_set_input()  argument
605 	val = readl(sgpio->chip.regs + ctrl_offset);  in sirfsoc_gpio_set_input()
607 	writel(val, sgpio->chip.regs + ctrl_offset);  in sirfsoc_gpio_set_input()
612 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip);  in sirfsoc_gpio_request()  local
613 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);  in sirfsoc_gpio_request()
625 	sirfsoc_gpio_set_input(sgpio, SIRFSOC_GPIO_CTRL(bank->id, offset));  in sirfsoc_gpio_request()
626 	__sirfsoc_gpio_irq_mask(sgpio, bank, offset);  in sirfsoc_gpio_request()
635 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip);  in sirfsoc_gpio_free()  local
636 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);  in sirfsoc_gpio_free()
641 	__sirfsoc_gpio_irq_mask(sgpio, bank, offset);  in sirfsoc_gpio_free()
642 	sirfsoc_gpio_set_input(sgpio, SIRFSOC_GPIO_CTRL(bank->id, offset));  in sirfsoc_gpio_free()
651 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip);  in sirfsoc_gpio_direction_input()  local
652 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, gpio);  in sirfsoc_gpio_direction_input()
661 	sirfsoc_gpio_set_input(sgpio, offset);  in sirfsoc_gpio_direction_input()
668 static inline void sirfsoc_gpio_set_output(struct sirfsoc_gpio_chip *sgpio,  in sirfsoc_gpio_set_output()  argument
678 	out_ctrl = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_set_output()
686 	writel(out_ctrl, sgpio->chip.regs + offset);  in sirfsoc_gpio_set_output()
694 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip);  in sirfsoc_gpio_direction_output()  local
695 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, gpio);  in sirfsoc_gpio_direction_output()
702 	spin_lock_irqsave(&sgpio->lock, flags);  in sirfsoc_gpio_direction_output()
704 	sirfsoc_gpio_set_output(sgpio, bank, offset, value);  in sirfsoc_gpio_direction_output()
706 	spin_unlock_irqrestore(&sgpio->lock, flags);  in sirfsoc_gpio_direction_output()
713 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip);  in sirfsoc_gpio_get_value()  local
714 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);  in sirfsoc_gpio_get_value()
720 	val = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset));  in sirfsoc_gpio_get_value()
730 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip);  in sirfsoc_gpio_set_value()  local
731 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);  in sirfsoc_gpio_set_value()
737 	ctrl = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset));  in sirfsoc_gpio_set_value()
742 	writel(ctrl, sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset));  in sirfsoc_gpio_set_value()
747 static void sirfsoc_gpio_set_pullup(struct sirfsoc_gpio_chip *sgpio,  in sirfsoc_gpio_set_pullup()  argument
756 			u32 val = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_set_pullup()
759 			writel(val, sgpio->chip.regs + offset);  in sirfsoc_gpio_set_pullup()
764 static void sirfsoc_gpio_set_pulldown(struct sirfsoc_gpio_chip *sgpio,  in sirfsoc_gpio_set_pulldown()  argument
773 			u32 val = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_set_pulldown()
776 			writel(val, sgpio->chip.regs + offset);  in sirfsoc_gpio_set_pulldown()
784 	struct sirfsoc_gpio_chip *sgpio;  in sirfsoc_gpio_probe()  local
795 	sgpio = devm_kzalloc(&pdev->dev, sizeof(*sgpio), GFP_KERNEL);  in sirfsoc_gpio_probe()
796 	if (!sgpio)  in sirfsoc_gpio_probe()
798 	spin_lock_init(&sgpio->lock);  in sirfsoc_gpio_probe()
804 	sgpio->chip.gc.request = sirfsoc_gpio_request;  in sirfsoc_gpio_probe()
805 	sgpio->chip.gc.free = sirfsoc_gpio_free;  in sirfsoc_gpio_probe()
806 	sgpio->chip.gc.direction_input = sirfsoc_gpio_direction_input;  in sirfsoc_gpio_probe()
807 	sgpio->chip.gc.get = sirfsoc_gpio_get_value;  in sirfsoc_gpio_probe()
808 	sgpio->chip.gc.direction_output = sirfsoc_gpio_direction_output;  in sirfsoc_gpio_probe()
809 	sgpio->chip.gc.set = sirfsoc_gpio_set_value;  in sirfsoc_gpio_probe()
810 	sgpio->chip.gc.base = 0;  in sirfsoc_gpio_probe()
811 	sgpio->chip.gc.ngpio = SIRFSOC_GPIO_BANK_SIZE * SIRFSOC_GPIO_NO_OF_BANKS;  in sirfsoc_gpio_probe()
812 	sgpio->chip.gc.label = kasprintf(GFP_KERNEL, "%pOF", np);  in sirfsoc_gpio_probe()
813 	sgpio->chip.gc.of_node = np;  in sirfsoc_gpio_probe()
814 	sgpio->chip.gc.of_xlate = sirfsoc_gpio_of_xlate;  in sirfsoc_gpio_probe()
815 	sgpio->chip.gc.of_gpio_n_cells = 2;  in sirfsoc_gpio_probe()
816 	sgpio->chip.gc.parent = &pdev->dev;  in sirfsoc_gpio_probe()
817 	sgpio->chip.regs = regs;  in sirfsoc_gpio_probe()
819 	err = gpiochip_add_data(&sgpio->chip.gc, sgpio);  in sirfsoc_gpio_probe()
826 	err =  gpiochip_irqchip_add(&sgpio->chip.gc,  in sirfsoc_gpio_probe()
837 		bank = &sgpio->sgpio_bank[i];  in sirfsoc_gpio_probe()
845 		gpiochip_set_chained_irqchip(&sgpio->chip.gc,  in sirfsoc_gpio_probe()
851 	err = gpiochip_add_pin_range(&sgpio->chip.gc, dev_name(&pdev->dev),  in sirfsoc_gpio_probe()
861 		sirfsoc_gpio_set_pullup(sgpio, pullups);  in sirfsoc_gpio_probe()
865 		sirfsoc_gpio_set_pulldown(sgpio, pulldowns);  in sirfsoc_gpio_probe()
871 	gpiochip_remove(&sgpio->chip.gc);  in sirfsoc_gpio_probe()