Lines Matching refs:PINMUX_CFG_REG_VAR
5703 { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060020, 32,
5763 { PINMUX_CFG_REG_VAR("IPSR1", 0xE6060024, 32,
5800 { PINMUX_CFG_REG_VAR("IPSR2", 0xE6060028, 32,
5837 { PINMUX_CFG_REG_VAR("IPSR3", 0xE606002C, 32,
5876 { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060030, 32,
5921 { PINMUX_CFG_REG_VAR("IPSR5", 0xE6060034, 32,
5960 { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32,
6001 { PINMUX_CFG_REG_VAR("IPSR7", 0xE606003C, 32,
6043 { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060040, 32,
6087 { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060044, 32,
6132 { PINMUX_CFG_REG_VAR("IPSR10", 0xE6060048, 32,
6170 { PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32,
6218 { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060050, 32,
6260 { PINMUX_CFG_REG_VAR("IPSR13", 0xE6060054, 32,
6312 { PINMUX_CFG_REG_VAR("IPSR14", 0xE6060058, 32,
6357 { PINMUX_CFG_REG_VAR("IPSR15", 0xE606005C, 32,
6399 { PINMUX_CFG_REG_VAR("IPSR16", 0xE6060160, 32,
6432 { PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32,
6478 { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32,
6527 { PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32,
6570 { PINMUX_CFG_REG_VAR("MOD_SEL4", 0xE606009C, 32,