91 	struct pinctrl_dev *pctrl;  member
130 static int pm8xxx_read_bank(struct pm8xxx_gpio *pctrl,  in pm8xxx_read_bank()  argument
136 	ret = regmap_write(pctrl->regmap, pin->reg, val);  in pm8xxx_read_bank()
138 		dev_err(pctrl->dev, "failed to select bank %d\n", bank);  in pm8xxx_read_bank()
142 	ret = regmap_read(pctrl->regmap, pin->reg, &val);  in pm8xxx_read_bank()
144 		dev_err(pctrl->dev, "failed to read register %d\n", bank);  in pm8xxx_read_bank()
151 static int pm8xxx_write_bank(struct pm8xxx_gpio *pctrl,  in pm8xxx_write_bank()  argument
161 	ret = regmap_write(pctrl->regmap, pin->reg, val);  in pm8xxx_write_bank()
163 		dev_err(pctrl->dev, "failed to write register\n");  in pm8xxx_write_bank()
170 	struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_get_groups_count()  local
172 	return pctrl->npins;  in pm8xxx_get_groups_count()
187 	struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_get_group_pins()  local
189 	*pins = &pctrl->desc.pins[group].number;  in pm8xxx_get_group_pins()
219 	struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_get_function_groups()  local
222 	*num_groups = pctrl->npins;  in pm8xxx_get_function_groups()
230 	struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_pinmux_set_mux()  local
231 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data;  in pm8xxx_pinmux_set_mux()
237 	pm8xxx_write_bank(pctrl, pin, 4, val);  in pm8xxx_pinmux_set_mux()
253 	struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_pin_config_get()  local
254 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_pin_config_get()
323 	struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_pin_config_set()  local
324 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_pin_config_set()
350 				dev_err(pctrl->dev, "invalid pull-up strength\n");  in pm8xxx_pin_config_set()
380 				dev_err(pctrl->dev, "invalid drive strength\n");  in pm8xxx_pin_config_set()
395 			dev_err(pctrl->dev,  in pm8xxx_pin_config_set()
405 		pm8xxx_write_bank(pctrl, pin, 0, val);  in pm8xxx_pin_config_set()
412 		pm8xxx_write_bank(pctrl, pin, 1, val);  in pm8xxx_pin_config_set()
417 		pm8xxx_write_bank(pctrl, pin, 2, val);  in pm8xxx_pin_config_set()
423 		pm8xxx_write_bank(pctrl, pin, 3, val);  in pm8xxx_pin_config_set()
428 		pm8xxx_write_bank(pctrl, pin, 4, val);  in pm8xxx_pin_config_set()
435 		pm8xxx_write_bank(pctrl, pin, 5, val);  in pm8xxx_pin_config_set()
458 	struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip);  in pm8xxx_gpio_direction_input()  local
459 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_gpio_direction_input()
465 	pm8xxx_write_bank(pctrl, pin, 1, val);  in pm8xxx_gpio_direction_input()
474 	struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip);  in pm8xxx_gpio_direction_output()  local
475 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_gpio_direction_output()
485 	pm8xxx_write_bank(pctrl, pin, 1, val);  in pm8xxx_gpio_direction_output()
492 	struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip);  in pm8xxx_gpio_get()  local
493 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_gpio_get()
511 	struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip);  in pm8xxx_gpio_set()  local
512 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_gpio_set()
521 	pm8xxx_write_bank(pctrl, pin, 1, val);  in pm8xxx_gpio_set()
540 	struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip);  in pm8xxx_gpio_to_irq()  local
541 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_gpio_to_irq()
545 	fwspec.fwnode = pctrl->fwnode;  in pm8xxx_gpio_to_irq()
563 	struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip);  in pm8xxx_gpio_free()  local
564 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_gpio_free()
578 	struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip);  in pm8xxx_gpio_dbg_show_one()  local
579 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_gpio_dbg_show_one()
638 static int pm8xxx_pin_populate(struct pm8xxx_gpio *pctrl,  in pm8xxx_pin_populate()  argument
643 	val = pm8xxx_read_bank(pctrl, pin, 0);  in pm8xxx_pin_populate()
649 	val = pm8xxx_read_bank(pctrl, pin, 1);  in pm8xxx_pin_populate()
657 	val = pm8xxx_read_bank(pctrl, pin, 2);  in pm8xxx_pin_populate()
667 	val = pm8xxx_read_bank(pctrl, pin, 3);  in pm8xxx_pin_populate()
674 	val = pm8xxx_read_bank(pctrl, pin, 4);  in pm8xxx_pin_populate()
680 	val = pm8xxx_read_bank(pctrl, pin, 5);  in pm8xxx_pin_populate()
702 	struct pm8xxx_gpio *pctrl = container_of(domain->host_data,  in pm8xxx_domain_translate()  local
706 	    fwspec->param[0] > pctrl->chip.ngpio)  in pm8xxx_domain_translate()
718 	struct pm8xxx_gpio *pctrl = container_of(domain->host_data,  in pm8xxx_domain_alloc()  local
732 				    &pm8xxx_irq_chip, pctrl, handle_level_irq,  in pm8xxx_domain_alloc()
768 	struct pm8xxx_gpio *pctrl;  in pm8xxx_gpio_probe()  local
771 	pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);  in pm8xxx_gpio_probe()
772 	if (!pctrl)  in pm8xxx_gpio_probe()
775 	pctrl->dev = &pdev->dev;  in pm8xxx_gpio_probe()
776 	pctrl->npins = (uintptr_t) device_get_match_data(&pdev->dev);  in pm8xxx_gpio_probe()
778 	pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL);  in pm8xxx_gpio_probe()
779 	if (!pctrl->regmap) {  in pm8xxx_gpio_probe()
784 	pctrl->desc = pm8xxx_pinctrl_desc;  in pm8xxx_gpio_probe()
785 	pctrl->desc.npins = pctrl->npins;  in pm8xxx_gpio_probe()
788 			    pctrl->desc.npins,  in pm8xxx_gpio_probe()
795 				pctrl->desc.npins,  in pm8xxx_gpio_probe()
801 	for (i = 0; i < pctrl->desc.npins; i++) {  in pm8xxx_gpio_probe()
805 		ret = pm8xxx_pin_populate(pctrl, &pin_data[i]);  in pm8xxx_gpio_probe()
813 	pctrl->desc.pins = pins;  in pm8xxx_gpio_probe()
815 	pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_gpio_bindings);  in pm8xxx_gpio_probe()
816 	pctrl->desc.custom_params = pm8xxx_gpio_bindings;  in pm8xxx_gpio_probe()
818 	pctrl->desc.custom_conf_items = pm8xxx_conf_items;  in pm8xxx_gpio_probe()
821 	pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl);  in pm8xxx_gpio_probe()
822 	if (IS_ERR(pctrl->pctrl)) {  in pm8xxx_gpio_probe()
824 		return PTR_ERR(pctrl->pctrl);  in pm8xxx_gpio_probe()
827 	pctrl->chip = pm8xxx_gpio_template;  in pm8xxx_gpio_probe()
828 	pctrl->chip.base = -1;  in pm8xxx_gpio_probe()
829 	pctrl->chip.parent = &pdev->dev;  in pm8xxx_gpio_probe()
830 	pctrl->chip.of_node = pdev->dev.of_node;  in pm8xxx_gpio_probe()
831 	pctrl->chip.of_gpio_n_cells = 2;  in pm8xxx_gpio_probe()
832 	pctrl->chip.label = dev_name(pctrl->dev);  in pm8xxx_gpio_probe()
833 	pctrl->chip.ngpio = pctrl->npins;  in pm8xxx_gpio_probe()
835 	parent_node = of_irq_find_parent(pctrl->dev->of_node);  in pm8xxx_gpio_probe()
844 	pctrl->fwnode = of_node_to_fwnode(pctrl->dev->of_node);  in pm8xxx_gpio_probe()
845 	pctrl->domain = irq_domain_create_hierarchy(parent_domain, 0,  in pm8xxx_gpio_probe()
846 						    pctrl->chip.ngpio,  in pm8xxx_gpio_probe()
847 						    pctrl->fwnode,  in pm8xxx_gpio_probe()
849 						    &pctrl->chip);  in pm8xxx_gpio_probe()
850 	if (!pctrl->domain)  in pm8xxx_gpio_probe()
853 	ret = gpiochip_add_data(&pctrl->chip, pctrl);  in pm8xxx_gpio_probe()
869 	if (!of_property_read_bool(pctrl->dev->of_node, "gpio-ranges")) {  in pm8xxx_gpio_probe()
870 		ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev),  in pm8xxx_gpio_probe()
871 					     0, 0, pctrl->chip.ngpio);  in pm8xxx_gpio_probe()
873 			dev_err(pctrl->dev, "failed to add pin range\n");  in pm8xxx_gpio_probe()
878 	platform_set_drvdata(pdev, pctrl);  in pm8xxx_gpio_probe()
885 	gpiochip_remove(&pctrl->chip);  in pm8xxx_gpio_probe()
887 	irq_domain_remove(pctrl->domain);  in pm8xxx_gpio_probe()
894 	struct pm8xxx_gpio *pctrl = platform_get_drvdata(pdev);  in pm8xxx_gpio_remove()  local
896 	gpiochip_remove(&pctrl->chip);  in pm8xxx_gpio_remove()
897 	irq_domain_remove(pctrl->domain);  in pm8xxx_gpio_remove()