Lines Matching refs:pio

167 	enum at91_mux (*get_periph)(void __iomem *pio, unsigned mask);
168 void (*mux_A_periph)(void __iomem *pio, unsigned mask);
169 void (*mux_B_periph)(void __iomem *pio, unsigned mask);
170 void (*mux_C_periph)(void __iomem *pio, unsigned mask);
171 void (*mux_D_periph)(void __iomem *pio, unsigned mask);
172 bool (*get_deglitch)(void __iomem *pio, unsigned pin);
173 void (*set_deglitch)(void __iomem *pio, unsigned mask, bool is_on);
174 bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div);
175 void (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on, u32 div);
176 bool (*get_pulldown)(void __iomem *pio, unsigned pin);
177 void (*set_pulldown)(void __iomem *pio, unsigned mask, bool is_on);
178 bool (*get_schmitt_trig)(void __iomem *pio, unsigned pin);
179 void (*disable_schmitt_trig)(void __iomem *pio, unsigned mask);
180 unsigned (*get_drivestrength)(void __iomem *pio, unsigned pin);
181 void (*set_drivestrength)(void __iomem *pio, unsigned pin,
183 unsigned (*get_slewrate)(void __iomem *pio, unsigned pin);
184 void (*set_slewrate)(void __iomem *pio, unsigned pin, u32 slewrate);
380 static void at91_mux_disable_interrupt(void __iomem *pio, unsigned mask) in at91_mux_disable_interrupt() argument
382 writel_relaxed(mask, pio + PIO_IDR); in at91_mux_disable_interrupt()
385 static unsigned at91_mux_get_pullup(void __iomem *pio, unsigned pin) in at91_mux_get_pullup() argument
387 return !((readl_relaxed(pio + PIO_PUSR) >> pin) & 0x1); in at91_mux_get_pullup()
390 static void at91_mux_set_pullup(void __iomem *pio, unsigned mask, bool on) in at91_mux_set_pullup() argument
393 writel_relaxed(mask, pio + PIO_PPDDR); in at91_mux_set_pullup()
395 writel_relaxed(mask, pio + (on ? PIO_PUER : PIO_PUDR)); in at91_mux_set_pullup()
398 static bool at91_mux_get_output(void __iomem *pio, unsigned int pin, bool *val) in at91_mux_get_output() argument
400 *val = (readl_relaxed(pio + PIO_ODSR) >> pin) & 0x1; in at91_mux_get_output()
401 return (readl_relaxed(pio + PIO_OSR) >> pin) & 0x1; in at91_mux_get_output()
404 static void at91_mux_set_output(void __iomem *pio, unsigned int mask, in at91_mux_set_output() argument
407 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR)); in at91_mux_set_output()
408 writel_relaxed(mask, pio + (is_on ? PIO_OER : PIO_ODR)); in at91_mux_set_output()
411 static unsigned at91_mux_get_multidrive(void __iomem *pio, unsigned pin) in at91_mux_get_multidrive() argument
413 return (readl_relaxed(pio + PIO_MDSR) >> pin) & 0x1; in at91_mux_get_multidrive()
416 static void at91_mux_set_multidrive(void __iomem *pio, unsigned mask, bool on) in at91_mux_set_multidrive() argument
418 writel_relaxed(mask, pio + (on ? PIO_MDER : PIO_MDDR)); in at91_mux_set_multidrive()
421 static void at91_mux_set_A_periph(void __iomem *pio, unsigned mask) in at91_mux_set_A_periph() argument
423 writel_relaxed(mask, pio + PIO_ASR); in at91_mux_set_A_periph()
426 static void at91_mux_set_B_periph(void __iomem *pio, unsigned mask) in at91_mux_set_B_periph() argument
428 writel_relaxed(mask, pio + PIO_BSR); in at91_mux_set_B_periph()
431 static void at91_mux_pio3_set_A_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_A_periph() argument
434 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask, in at91_mux_pio3_set_A_periph()
435 pio + PIO_ABCDSR1); in at91_mux_pio3_set_A_periph()
436 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask, in at91_mux_pio3_set_A_periph()
437 pio + PIO_ABCDSR2); in at91_mux_pio3_set_A_periph()
440 static void at91_mux_pio3_set_B_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_B_periph() argument
442 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask, in at91_mux_pio3_set_B_periph()
443 pio + PIO_ABCDSR1); in at91_mux_pio3_set_B_periph()
444 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask, in at91_mux_pio3_set_B_periph()
445 pio + PIO_ABCDSR2); in at91_mux_pio3_set_B_periph()
448 static void at91_mux_pio3_set_C_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_C_periph() argument
450 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1); in at91_mux_pio3_set_C_periph()
451 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2); in at91_mux_pio3_set_C_periph()
454 static void at91_mux_pio3_set_D_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_D_periph() argument
456 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1); in at91_mux_pio3_set_D_periph()
457 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2); in at91_mux_pio3_set_D_periph()
460 static enum at91_mux at91_mux_pio3_get_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_get_periph() argument
464 if (readl_relaxed(pio + PIO_PSR) & mask) in at91_mux_pio3_get_periph()
467 select = !!(readl_relaxed(pio + PIO_ABCDSR1) & mask); in at91_mux_pio3_get_periph()
468 select |= (!!(readl_relaxed(pio + PIO_ABCDSR2) & mask) << 1); in at91_mux_pio3_get_periph()
473 static enum at91_mux at91_mux_get_periph(void __iomem *pio, unsigned mask) in at91_mux_get_periph() argument
477 if (readl_relaxed(pio + PIO_PSR) & mask) in at91_mux_get_periph()
480 select = readl_relaxed(pio + PIO_ABSR) & mask; in at91_mux_get_periph()
485 static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin) in at91_mux_get_deglitch() argument
487 return (readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1; in at91_mux_get_deglitch()
490 static void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on) in at91_mux_set_deglitch() argument
492 writel_relaxed(mask, pio + (is_on ? PIO_IFER : PIO_IFDR)); in at91_mux_set_deglitch()
495 static bool at91_mux_pio3_get_deglitch(void __iomem *pio, unsigned pin) in at91_mux_pio3_get_deglitch() argument
497 if ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) in at91_mux_pio3_get_deglitch()
498 return !((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1); in at91_mux_pio3_get_deglitch()
503 static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on) in at91_mux_pio3_set_deglitch() argument
506 writel_relaxed(mask, pio + PIO_IFSCDR); in at91_mux_pio3_set_deglitch()
507 at91_mux_set_deglitch(pio, mask, is_on); in at91_mux_pio3_set_deglitch()
510 static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div) in at91_mux_pio3_get_debounce() argument
512 *div = readl_relaxed(pio + PIO_SCDR); in at91_mux_pio3_get_debounce()
514 return ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) && in at91_mux_pio3_get_debounce()
515 ((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1); in at91_mux_pio3_get_debounce()
518 static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask, in at91_mux_pio3_set_debounce() argument
522 writel_relaxed(mask, pio + PIO_IFSCER); in at91_mux_pio3_set_debounce()
523 writel_relaxed(div & PIO_SCDR_DIV, pio + PIO_SCDR); in at91_mux_pio3_set_debounce()
524 writel_relaxed(mask, pio + PIO_IFER); in at91_mux_pio3_set_debounce()
526 writel_relaxed(mask, pio + PIO_IFSCDR); in at91_mux_pio3_set_debounce()
529 static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin) in at91_mux_pio3_get_pulldown() argument
531 return !((readl_relaxed(pio + PIO_PPDSR) >> pin) & 0x1); in at91_mux_pio3_get_pulldown()
534 static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on) in at91_mux_pio3_set_pulldown() argument
537 writel_relaxed(mask, pio + PIO_PUDR); in at91_mux_pio3_set_pulldown()
539 writel_relaxed(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR)); in at91_mux_pio3_set_pulldown()
542 static void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask) in at91_mux_pio3_disable_schmitt_trig() argument
544 writel_relaxed(readl_relaxed(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT); in at91_mux_pio3_disable_schmitt_trig()
547 static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin) in at91_mux_pio3_get_schmitt_trig() argument
549 return (readl_relaxed(pio + PIO_SCHMITT) >> pin) & 0x1; in at91_mux_pio3_get_schmitt_trig()
561 static unsigned at91_mux_sama5d3_get_drivestrength(void __iomem *pio, in at91_mux_sama5d3_get_drivestrength() argument
564 unsigned tmp = read_drive_strength(pio + in at91_mux_sama5d3_get_drivestrength()
575 static unsigned at91_mux_sam9x5_get_drivestrength(void __iomem *pio, in at91_mux_sam9x5_get_drivestrength() argument
578 unsigned tmp = read_drive_strength(pio + in at91_mux_sam9x5_get_drivestrength()
588 static unsigned at91_mux_sam9x60_get_drivestrength(void __iomem *pio, in at91_mux_sam9x60_get_drivestrength() argument
591 unsigned tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1); in at91_mux_sam9x60_get_drivestrength()
599 static unsigned at91_mux_sam9x60_get_slewrate(void __iomem *pio, unsigned pin) in at91_mux_sam9x60_get_slewrate() argument
601 unsigned tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR); in at91_mux_sam9x60_get_slewrate()
620 static void at91_mux_sama5d3_set_drivestrength(void __iomem *pio, unsigned pin, in at91_mux_sama5d3_set_drivestrength() argument
628 set_drive_strength(pio + sama5d3_get_drive_register(pin), pin, setting); in at91_mux_sama5d3_set_drivestrength()
631 static void at91_mux_sam9x5_set_drivestrength(void __iomem *pio, unsigned pin, in at91_mux_sam9x5_set_drivestrength() argument
642 set_drive_strength(pio + at91sam9x5_get_drive_register(pin), pin, in at91_mux_sam9x5_set_drivestrength()
646 static void at91_mux_sam9x60_set_drivestrength(void __iomem *pio, unsigned pin, in at91_mux_sam9x60_set_drivestrength() argument
656 tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1); in at91_mux_sam9x60_set_drivestrength()
664 writel_relaxed(tmp, pio + SAM9X60_PIO_DRIVER1); in at91_mux_sam9x60_set_drivestrength()
667 static void at91_mux_sam9x60_set_slewrate(void __iomem *pio, unsigned pin, in at91_mux_sam9x60_set_slewrate() argument
675 tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR); in at91_mux_sam9x60_set_slewrate()
682 writel_relaxed(tmp, pio + SAM9X60_PIO_SLEWR); in at91_mux_sam9x60_set_slewrate()
809 static void at91_mux_gpio_disable(void __iomem *pio, unsigned mask) in at91_mux_gpio_disable() argument
811 writel_relaxed(mask, pio + PIO_PDR); in at91_mux_gpio_disable()
814 static void at91_mux_gpio_enable(void __iomem *pio, unsigned mask, bool input) in at91_mux_gpio_enable() argument
816 writel_relaxed(mask, pio + PIO_PER); in at91_mux_gpio_enable()
817 writel_relaxed(mask, pio + (input ? PIO_ODR : PIO_OER)); in at91_mux_gpio_enable()
829 void __iomem *pio; in at91_pmx_set() local
846 pio = pin_to_controller(info, pin->bank); in at91_pmx_set()
848 if (!pio) in at91_pmx_set()
852 at91_mux_disable_interrupt(pio, mask); in at91_pmx_set()
855 at91_mux_gpio_enable(pio, mask, 1); in at91_pmx_set()
858 info->ops->mux_A_periph(pio, mask); in at91_pmx_set()
861 info->ops->mux_B_periph(pio, mask); in at91_pmx_set()
866 info->ops->mux_C_periph(pio, mask); in at91_pmx_set()
871 info->ops->mux_D_periph(pio, mask); in at91_pmx_set()
875 at91_mux_gpio_disable(pio, mask); in at91_pmx_set()
963 void __iomem *pio; in at91_pinconf_get() local
970 pio = pin_to_controller(info, pin_to_bank(pin_id)); in at91_pinconf_get()
972 if (!pio) in at91_pinconf_get()
977 if (at91_mux_get_multidrive(pio, pin)) in at91_pinconf_get()
980 if (at91_mux_get_pullup(pio, pin)) in at91_pinconf_get()
983 if (info->ops->get_deglitch && info->ops->get_deglitch(pio, pin)) in at91_pinconf_get()
985 if (info->ops->get_debounce && info->ops->get_debounce(pio, pin, &div)) in at91_pinconf_get()
987 if (info->ops->get_pulldown && info->ops->get_pulldown(pio, pin)) in at91_pinconf_get()
989 if (info->ops->get_schmitt_trig && info->ops->get_schmitt_trig(pio, pin)) in at91_pinconf_get()
992 *config |= (info->ops->get_drivestrength(pio, pin) in at91_pinconf_get()
995 *config |= (info->ops->get_slewrate(pio, pin) << SLEWRATE_SHIFT); in at91_pinconf_get()
996 if (at91_mux_get_output(pio, pin, &out)) in at91_pinconf_get()
1008 void __iomem *pio; in at91_pinconf_set() local
1019 pio = pin_to_controller(info, pin_to_bank(pin_id)); in at91_pinconf_set()
1021 if (!pio) in at91_pinconf_set()
1030 at91_mux_set_output(pio, mask, config & OUTPUT, in at91_pinconf_set()
1032 at91_mux_set_pullup(pio, mask, config & PULL_UP); in at91_pinconf_set()
1033 at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE); in at91_pinconf_set()
1035 info->ops->set_deglitch(pio, mask, config & DEGLITCH); in at91_pinconf_set()
1037 info->ops->set_debounce(pio, mask, config & DEBOUNCE, in at91_pinconf_set()
1040 info->ops->set_pulldown(pio, mask, config & PULL_DOWN); in at91_pinconf_set()
1042 info->ops->disable_schmitt_trig(pio, mask); in at91_pinconf_set()
1044 info->ops->set_drivestrength(pio, pin, in at91_pinconf_set()
1048 info->ops->set_slewrate(pio, pin, in at91_pinconf_set()
1412 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get_direction() local
1416 osr = readl_relaxed(pio + PIO_OSR); in at91_gpio_get_direction()
1423 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_input() local
1426 writel_relaxed(mask, pio + PIO_ODR); in at91_gpio_direction_input()
1433 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get() local
1437 pdsr = readl_relaxed(pio + PIO_PDSR); in at91_gpio_get()
1445 void __iomem *pio = at91_gpio->regbase; in at91_gpio_set() local
1448 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR)); in at91_gpio_set()
1455 void __iomem *pio = at91_gpio->regbase; in at91_gpio_set_multiple() local
1462 writel_relaxed(set_mask, pio + PIO_SODR); in at91_gpio_set_multiple()
1463 writel_relaxed(clear_mask, pio + PIO_CODR); in at91_gpio_set_multiple()
1470 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_output() local
1473 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR)); in at91_gpio_direction_output()
1474 writel_relaxed(mask, pio + PIO_OER); in at91_gpio_direction_output()
1485 void __iomem *pio = at91_gpio->regbase; in at91_gpio_dbg_show() local
1494 mode = at91_gpio->ops->get_periph(pio, mask); in at91_gpio_dbg_show()
1500 readl_relaxed(pio + PIO_OSR) & mask ? in at91_gpio_dbg_show()
1503 readl_relaxed(pio + PIO_PDSR) & mask ? in at91_gpio_dbg_show()
1532 void __iomem *pio = at91_gpio->regbase; in gpio_irq_mask() local
1535 if (pio) in gpio_irq_mask()
1536 writel_relaxed(mask, pio + PIO_IDR); in gpio_irq_mask()
1542 void __iomem *pio = at91_gpio->regbase; in gpio_irq_unmask() local
1545 if (pio) in gpio_irq_unmask()
1546 writel_relaxed(mask, pio + PIO_IER); in gpio_irq_unmask()
1564 void __iomem *pio = at91_gpio->regbase; in alt_gpio_irq_type() local
1570 writel_relaxed(mask, pio + PIO_ESR); in alt_gpio_irq_type()
1571 writel_relaxed(mask, pio + PIO_REHLSR); in alt_gpio_irq_type()
1575 writel_relaxed(mask, pio + PIO_ESR); in alt_gpio_irq_type()
1576 writel_relaxed(mask, pio + PIO_FELLSR); in alt_gpio_irq_type()
1580 writel_relaxed(mask, pio + PIO_LSR); in alt_gpio_irq_type()
1581 writel_relaxed(mask, pio + PIO_FELLSR); in alt_gpio_irq_type()
1585 writel_relaxed(mask, pio + PIO_LSR); in alt_gpio_irq_type()
1586 writel_relaxed(mask, pio + PIO_REHLSR); in alt_gpio_irq_type()
1594 writel_relaxed(mask, pio + PIO_AIMDR); in alt_gpio_irq_type()
1603 writel_relaxed(mask, pio + PIO_AIMER); in alt_gpio_irq_type()
1642 void __iomem *pio; in at91_pinctrl_gpio_suspend() local
1647 pio = gpio_chips[i]->regbase; in at91_pinctrl_gpio_suspend()
1649 backups[i] = readl_relaxed(pio + PIO_IMR); in at91_pinctrl_gpio_suspend()
1650 writel_relaxed(backups[i], pio + PIO_IDR); in at91_pinctrl_gpio_suspend()
1651 writel_relaxed(wakeups[i], pio + PIO_IER); in at91_pinctrl_gpio_suspend()
1666 void __iomem *pio; in at91_pinctrl_gpio_resume() local
1671 pio = gpio_chips[i]->regbase; in at91_pinctrl_gpio_resume()
1676 writel_relaxed(wakeups[i], pio + PIO_IDR); in at91_pinctrl_gpio_resume()
1677 writel_relaxed(backups[i], pio + PIO_IER); in at91_pinctrl_gpio_resume()
1690 void __iomem *pio = at91_gpio->regbase; in gpio_irq_handler() local
1700 isr = readl_relaxed(pio + PIO_ISR) & readl_relaxed(pio + PIO_IMR); in gpio_irq_handler()
1705 pio = at91_gpio->regbase; in gpio_irq_handler()