Lines Matching refs:regval

657 	unsigned int regval, val;  in artpec6_pmx_select_func()  local
684 regval = readl(pmx->base + reg); in artpec6_pmx_select_func()
685 regval &= ~ARTPEC6_PINMUX_SEL_MASK; in artpec6_pmx_select_func()
686 regval |= val; in artpec6_pmx_select_func()
687 writel(regval, pmx->base + reg); in artpec6_pmx_select_func()
738 unsigned int regval; in artpec6_pconf_get() local
751 regval = readl(pmx->base + artpec6_pmx_reg_offset(pin)); in artpec6_pconf_get()
756 if (!(regval & ARTPEC6_PINMUX_UDC1_MASK)) in artpec6_pconf_get()
762 if (regval & ARTPEC6_PINMUX_UDC1_MASK) in artpec6_pconf_get()
765 regval = regval & ARTPEC6_PINMUX_UDC0_MASK; in artpec6_pconf_get()
766 if ((param == PIN_CONFIG_BIAS_PULL_UP && !regval) || in artpec6_pconf_get()
767 (param == PIN_CONFIG_BIAS_PULL_DOWN && regval)) in artpec6_pconf_get()
771 regval = (regval & ARTPEC6_PINMUX_DRV_MASK) in artpec6_pconf_get()
773 regval = artpec6_pconf_drive_field_to_mA(regval); in artpec6_pconf_get()
774 *config = pinconf_to_config_packed(param, regval); in artpec6_pconf_get()
800 unsigned int regval; in artpec6_pconf_set() local
825 regval = readl(reg); in artpec6_pconf_set()
826 regval |= (1 << ARTPEC6_PINMUX_UDC1_SHIFT); in artpec6_pconf_set()
827 writel(regval, reg); in artpec6_pconf_set()
837 regval = readl(reg); in artpec6_pconf_set()
838 regval |= (arg << ARTPEC6_PINMUX_UDC0_SHIFT); in artpec6_pconf_set()
839 regval &= ~ARTPEC6_PINMUX_UDC1_MASK; /* Enable */ in artpec6_pconf_set()
840 writel(regval, reg); in artpec6_pconf_set()
850 regval = readl(reg); in artpec6_pconf_set()
851 regval &= ~(arg << ARTPEC6_PINMUX_UDC0_SHIFT); in artpec6_pconf_set()
852 regval &= ~ARTPEC6_PINMUX_UDC1_MASK; /* Enable */ in artpec6_pconf_set()
853 writel(regval, reg); in artpec6_pconf_set()
864 regval = readl(reg); in artpec6_pconf_set()
865 regval &= ~ARTPEC6_PINMUX_DRV_MASK; in artpec6_pconf_set()
866 regval |= (drive << ARTPEC6_PINMUX_DRV_SHIFT); in artpec6_pconf_set()
867 writel(regval, reg); in artpec6_pconf_set()