Lines Matching refs:slpm
307 u32 slpm; in __nmk_gpio_set_slpm() local
309 slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC); in __nmk_gpio_set_slpm()
311 slpm |= BIT(offset); in __nmk_gpio_set_slpm()
313 slpm &= ~BIT(offset); in __nmk_gpio_set_slpm()
314 writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC); in __nmk_gpio_set_slpm()
544 static void nmk_gpio_glitch_slpm_init(unsigned int *slpm) in nmk_gpio_glitch_slpm_init() argument
550 unsigned int temp = slpm[i]; in nmk_gpio_glitch_slpm_init()
557 slpm[i] = readl(chip->addr + NMK_GPIO_SLPC); in nmk_gpio_glitch_slpm_init()
562 static void nmk_gpio_glitch_slpm_restore(unsigned int *slpm) in nmk_gpio_glitch_slpm_restore() argument
572 writel(slpm[i], chip->addr + NMK_GPIO_SLPC); in nmk_gpio_glitch_slpm_restore()
1561 static unsigned int slpm[NUM_BANKS]; in nmk_pmx_set() local
1601 memset(slpm, 0xff, sizeof(slpm)); in nmk_pmx_set()
1608 slpm[g->pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(g->pins[i]); in nmk_pmx_set()
1609 nmk_gpio_glitch_slpm_init(slpm); in nmk_pmx_set()
1658 nmk_gpio_glitch_slpm_restore(slpm); in nmk_pmx_set()
1740 int pull, slpm, output, val, i; in nmk_pin_config_set() local
1758 slpm = PIN_SLPM(cfg); in nmk_pin_config_set()
1795 pin, cfg, pullnames[pull], slpmnames[slpm], in nmk_pin_config_set()
1814 __nmk_gpio_set_slpm(nmk_chip, bit, slpm); in nmk_pin_config_set()