Lines Matching refs:pctrl
666 static void __iomem *chv_padreg(struct chv_pinctrl *pctrl, unsigned int offset, in chv_padreg() argument
675 return pctrl->regs + offset + reg; in chv_padreg()
686 static bool chv_pad_locked(struct chv_pinctrl *pctrl, unsigned int offset) in chv_pad_locked() argument
690 reg = chv_padreg(pctrl, offset, CHV_PADCTRL1); in chv_pad_locked()
696 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_groups_count() local
698 return pctrl->community->ngroups; in chv_get_groups_count()
704 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_group_name() local
706 return pctrl->community->groups[group].name; in chv_get_group_name()
712 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_group_pins() local
714 *pins = pctrl->community->groups[group].pins; in chv_get_group_pins()
715 *npins = pctrl->community->groups[group].npins; in chv_get_group_pins()
722 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_pin_dbg_show() local
729 ctrl0 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0)); in chv_pin_dbg_show()
730 ctrl1 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL1)); in chv_pin_dbg_show()
731 locked = chv_pad_locked(pctrl, offset); in chv_pin_dbg_show()
761 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_functions_count() local
763 return pctrl->community->nfunctions; in chv_get_functions_count()
769 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_function_name() local
771 return pctrl->community->functions[function].name; in chv_get_function_name()
779 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_function_groups() local
781 *groups = pctrl->community->functions[function].groups; in chv_get_function_groups()
782 *ngroups = pctrl->community->functions[function].ngroups; in chv_get_function_groups()
789 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_pinmux_set_mux() local
794 grp = &pctrl->community->groups[group]; in chv_pinmux_set_mux()
800 if (chv_pad_locked(pctrl, grp->pins[i])) { in chv_pinmux_set_mux()
801 dev_warn(pctrl->dev, "unable to set mode for locked pin %u\n", in chv_pinmux_set_mux()
826 reg = chv_padreg(pctrl, pin, CHV_PADCTRL0); in chv_pinmux_set_mux()
836 reg = chv_padreg(pctrl, pin, CHV_PADCTRL1); in chv_pinmux_set_mux()
842 dev_dbg(pctrl->dev, "configured pin %u mode %u OE %sinverted\n", in chv_pinmux_set_mux()
851 static void chv_gpio_clear_triggering(struct chv_pinctrl *pctrl, in chv_gpio_clear_triggering() argument
857 reg = chv_padreg(pctrl, offset, CHV_PADCTRL1); in chv_gpio_clear_triggering()
868 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_gpio_request_enable() local
875 if (chv_pad_locked(pctrl, offset)) { in chv_gpio_request_enable()
876 value = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0)); in chv_gpio_request_enable()
886 for (i = 0; i < ARRAY_SIZE(pctrl->intr_lines); i++) { in chv_gpio_request_enable()
887 if (pctrl->intr_lines[i] == offset) { in chv_gpio_request_enable()
888 pctrl->intr_lines[i] = 0; in chv_gpio_request_enable()
894 chv_gpio_clear_triggering(pctrl, offset); in chv_gpio_request_enable()
896 reg = chv_padreg(pctrl, offset, CHV_PADCTRL0); in chv_gpio_request_enable()
924 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_gpio_disable_free() local
929 if (!chv_pad_locked(pctrl, offset)) in chv_gpio_disable_free()
930 chv_gpio_clear_triggering(pctrl, offset); in chv_gpio_disable_free()
939 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_gpio_set_direction() local
940 void __iomem *reg = chv_padreg(pctrl, offset, CHV_PADCTRL0); in chv_gpio_set_direction()
971 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_config_get() local
979 ctrl0 = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); in chv_config_get()
980 ctrl1 = readl(chv_padreg(pctrl, pin, CHV_PADCTRL1)); in chv_config_get()
1048 static int chv_config_set_pull(struct chv_pinctrl *pctrl, unsigned int pin, in chv_config_set_pull() argument
1051 void __iomem *reg = chv_padreg(pctrl, pin, CHV_PADCTRL0); in chv_config_set_pull()
1114 static int chv_config_set_oden(struct chv_pinctrl *pctrl, unsigned int pin, in chv_config_set_oden() argument
1117 void __iomem *reg = chv_padreg(pctrl, pin, CHV_PADCTRL1); in chv_config_set_oden()
1138 struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_config_set() local
1143 if (chv_pad_locked(pctrl, pin)) in chv_config_set()
1154 ret = chv_config_set_pull(pctrl, pin, param, arg); in chv_config_set()
1160 ret = chv_config_set_oden(pctrl, pin, false); in chv_config_set()
1166 ret = chv_config_set_oden(pctrl, pin, true); in chv_config_set()
1175 dev_dbg(pctrl->dev, "pin %d set config %d arg %u\n", pin, in chv_config_set()
1239 struct chv_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_get() local
1244 ctrl0 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0)); in chv_gpio_get()
1257 struct chv_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_set() local
1264 reg = chv_padreg(pctrl, offset, CHV_PADCTRL0); in chv_gpio_set()
1279 struct chv_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_get_direction() local
1284 ctrl0 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0)); in chv_gpio_get_direction()
1319 struct chv_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_ack() local
1325 intr_line = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); in chv_gpio_irq_ack()
1328 chv_writel(BIT(intr_line), pctrl->regs + CHV_INTSTAT); in chv_gpio_irq_ack()
1336 struct chv_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_mask_unmask() local
1343 intr_line = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); in chv_gpio_irq_mask_unmask()
1347 value = readl(pctrl->regs + CHV_INTMASK); in chv_gpio_irq_mask_unmask()
1352 chv_writel(value, pctrl->regs + CHV_INTMASK); in chv_gpio_irq_mask_unmask()
1381 struct chv_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_startup() local
1388 intsel = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); in chv_gpio_irq_startup()
1392 value = readl(chv_padreg(pctrl, pin, CHV_PADCTRL1)); in chv_gpio_irq_startup()
1398 if (!pctrl->intr_lines[intsel]) { in chv_gpio_irq_startup()
1400 pctrl->intr_lines[intsel] = pin; in chv_gpio_irq_startup()
1412 struct chv_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_type() local
1432 if (!chv_pad_locked(pctrl, pin)) { in chv_gpio_irq_type()
1433 void __iomem *reg = chv_padreg(pctrl, pin, CHV_PADCTRL1); in chv_gpio_irq_type()
1455 value = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0)); in chv_gpio_irq_type()
1459 pctrl->intr_lines[value] = pin; in chv_gpio_irq_type()
1474 struct chv_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_handler() local
1481 pending = readl(pctrl->regs + CHV_INTSTAT); in chv_gpio_irq_handler()
1482 for_each_set_bit(intr_line, &pending, pctrl->community->nirqs) { in chv_gpio_irq_handler()
1485 offset = pctrl->intr_lines[intr_line]; in chv_gpio_irq_handler()
1538 struct chv_pinctrl *pctrl = gpiochip_get_data(chip); in chv_init_irq_valid_mask() local
1539 const struct chv_community *community = pctrl->community; in chv_init_irq_valid_mask()
1549 intsel = readl(chv_padreg(pctrl, desc->number, CHV_PADCTRL0)); in chv_init_irq_valid_mask()
1558 static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq) in chv_gpio_probe() argument
1561 struct gpio_chip *chip = &pctrl->chip; in chv_gpio_probe()
1563 const struct chv_community *community = pctrl->community; in chv_gpio_probe()
1569 chip->label = dev_name(pctrl->dev); in chv_gpio_probe()
1570 chip->parent = pctrl->dev; in chv_gpio_probe()
1575 ret = devm_gpiochip_add_data(pctrl->dev, chip, pctrl); in chv_gpio_probe()
1577 dev_err(pctrl->dev, "Failed to register gpiochip\n"); in chv_gpio_probe()
1583 ret = gpiochip_add_pin_range(chip, dev_name(pctrl->dev), in chv_gpio_probe()
1587 dev_err(pctrl->dev, "failed to add GPIO pin range\n"); in chv_gpio_probe()
1604 chv_writel(GENMASK(31, pctrl->community->nirqs), in chv_gpio_probe()
1605 pctrl->regs + CHV_INTMASK); in chv_gpio_probe()
1609 chv_writel(0xffff, pctrl->regs + CHV_INTSTAT); in chv_gpio_probe()
1612 irq_base = devm_irq_alloc_descs(pctrl->dev, -1, 0, in chv_gpio_probe()
1615 dev_err(pctrl->dev, "Failed to allocate IRQ numbers\n"); in chv_gpio_probe()
1620 pctrl->irqchip.name = "chv-gpio"; in chv_gpio_probe()
1621 pctrl->irqchip.irq_startup = chv_gpio_irq_startup; in chv_gpio_probe()
1622 pctrl->irqchip.irq_ack = chv_gpio_irq_ack; in chv_gpio_probe()
1623 pctrl->irqchip.irq_mask = chv_gpio_irq_mask; in chv_gpio_probe()
1624 pctrl->irqchip.irq_unmask = chv_gpio_irq_unmask; in chv_gpio_probe()
1625 pctrl->irqchip.irq_set_type = chv_gpio_irq_type; in chv_gpio_probe()
1626 pctrl->irqchip.flags = IRQCHIP_SKIP_SET_WAKE; in chv_gpio_probe()
1628 ret = gpiochip_irqchip_add(chip, &pctrl->irqchip, 0, in chv_gpio_probe()
1631 dev_err(pctrl->dev, "failed to add IRQ chip\n"); in chv_gpio_probe()
1645 gpiochip_set_chained_irqchip(chip, &pctrl->irqchip, irq, in chv_gpio_probe()
1654 struct chv_pinctrl *pctrl = region_context; in chv_pinctrl_mmio_access_handler() local
1661 chv_writel((u32)(*value), pctrl->regs + (u32)address); in chv_pinctrl_mmio_access_handler()
1663 *value = readl(pctrl->regs + (u32)address); in chv_pinctrl_mmio_access_handler()
1674 struct chv_pinctrl *pctrl; in chv_pinctrl_probe() local
1683 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); in chv_pinctrl_probe()
1684 if (!pctrl) in chv_pinctrl_probe()
1689 pctrl->community = chv_communities[i]; in chv_pinctrl_probe()
1695 pctrl->dev = &pdev->dev; in chv_pinctrl_probe()
1698 pctrl->saved_pin_context = devm_kcalloc(pctrl->dev, in chv_pinctrl_probe()
1699 pctrl->community->npins, sizeof(*pctrl->saved_pin_context), in chv_pinctrl_probe()
1701 if (!pctrl->saved_pin_context) in chv_pinctrl_probe()
1705 pctrl->regs = devm_platform_ioremap_resource(pdev, 0); in chv_pinctrl_probe()
1706 if (IS_ERR(pctrl->regs)) in chv_pinctrl_probe()
1707 return PTR_ERR(pctrl->regs); in chv_pinctrl_probe()
1713 pctrl->pctldesc = chv_pinctrl_desc; in chv_pinctrl_probe()
1714 pctrl->pctldesc.name = dev_name(&pdev->dev); in chv_pinctrl_probe()
1715 pctrl->pctldesc.pins = pctrl->community->pins; in chv_pinctrl_probe()
1716 pctrl->pctldesc.npins = pctrl->community->npins; in chv_pinctrl_probe()
1718 pctrl->pctldev = devm_pinctrl_register(&pdev->dev, &pctrl->pctldesc, in chv_pinctrl_probe()
1719 pctrl); in chv_pinctrl_probe()
1720 if (IS_ERR(pctrl->pctldev)) { in chv_pinctrl_probe()
1722 return PTR_ERR(pctrl->pctldev); in chv_pinctrl_probe()
1725 ret = chv_gpio_probe(pctrl, irq); in chv_pinctrl_probe()
1730 pctrl->community->acpi_space_id, in chv_pinctrl_probe()
1732 NULL, pctrl); in chv_pinctrl_probe()
1736 platform_set_drvdata(pdev, pctrl); in chv_pinctrl_probe()
1743 struct chv_pinctrl *pctrl = platform_get_drvdata(pdev); in chv_pinctrl_remove() local
1746 pctrl->community->acpi_space_id, in chv_pinctrl_remove()
1755 struct chv_pinctrl *pctrl = dev_get_drvdata(dev); in chv_pinctrl_suspend_noirq() local
1761 pctrl->saved_intmask = readl(pctrl->regs + CHV_INTMASK); in chv_pinctrl_suspend_noirq()
1763 for (i = 0; i < pctrl->community->npins; i++) { in chv_pinctrl_suspend_noirq()
1768 desc = &pctrl->community->pins[i]; in chv_pinctrl_suspend_noirq()
1769 if (chv_pad_locked(pctrl, desc->number)) in chv_pinctrl_suspend_noirq()
1772 ctx = &pctrl->saved_pin_context[i]; in chv_pinctrl_suspend_noirq()
1774 reg = chv_padreg(pctrl, desc->number, CHV_PADCTRL0); in chv_pinctrl_suspend_noirq()
1777 reg = chv_padreg(pctrl, desc->number, CHV_PADCTRL1); in chv_pinctrl_suspend_noirq()
1788 struct chv_pinctrl *pctrl = dev_get_drvdata(dev); in chv_pinctrl_resume_noirq() local
1799 chv_writel(0, pctrl->regs + CHV_INTMASK); in chv_pinctrl_resume_noirq()
1801 for (i = 0; i < pctrl->community->npins; i++) { in chv_pinctrl_resume_noirq()
1807 desc = &pctrl->community->pins[i]; in chv_pinctrl_resume_noirq()
1808 if (chv_pad_locked(pctrl, desc->number)) in chv_pinctrl_resume_noirq()
1811 ctx = &pctrl->saved_pin_context[i]; in chv_pinctrl_resume_noirq()
1814 reg = chv_padreg(pctrl, desc->number, CHV_PADCTRL0); in chv_pinctrl_resume_noirq()
1818 dev_dbg(pctrl->dev, "restored pin %2u ctrl0 0x%08x\n", in chv_pinctrl_resume_noirq()
1822 reg = chv_padreg(pctrl, desc->number, CHV_PADCTRL1); in chv_pinctrl_resume_noirq()
1826 dev_dbg(pctrl->dev, "restored pin %2u ctrl1 0x%08x\n", in chv_pinctrl_resume_noirq()
1835 chv_writel(0xffff, pctrl->regs + CHV_INTSTAT); in chv_pinctrl_resume_noirq()
1836 chv_writel(pctrl->saved_intmask, pctrl->regs + CHV_INTMASK); in chv_pinctrl_resume_noirq()