122 	u32 tmp;  in u2_phy_slew_rate_calibrate()  local
129 	tmp = readl(pbase + XSP_USBPHYACR5);  in u2_phy_slew_rate_calibrate()
130 	tmp |= P2A5_RG_HSTX_SRCAL_EN;  in u2_phy_slew_rate_calibrate()
131 	writel(tmp, pbase + XSP_USBPHYACR5);  in u2_phy_slew_rate_calibrate()
135 	tmp = readl(pbase + XSP_U2FREQ_FMMONR1);  in u2_phy_slew_rate_calibrate()
136 	tmp |= P2F_RG_FRCK_EN;  in u2_phy_slew_rate_calibrate()
137 	writel(tmp, pbase + XSP_U2FREQ_FMMONR1);  in u2_phy_slew_rate_calibrate()
140 	tmp = readl(pbase + XSP_U2FREQ_FMCR0);  in u2_phy_slew_rate_calibrate()
141 	tmp &= ~(P2F_RG_CYCLECNT);  in u2_phy_slew_rate_calibrate()
142 	tmp |= P2F_RG_CYCLECNT_VAL(XSP_FM_DET_CYCLE_CNT);  in u2_phy_slew_rate_calibrate()
143 	writel(tmp, pbase + XSP_U2FREQ_FMCR0);  in u2_phy_slew_rate_calibrate()
146 	tmp = readl(pbase + XSP_U2FREQ_FMCR0);  in u2_phy_slew_rate_calibrate()
147 	tmp |= P2F_RG_FREQDET_EN;  in u2_phy_slew_rate_calibrate()
148 	writel(tmp, pbase + XSP_U2FREQ_FMCR0);  in u2_phy_slew_rate_calibrate()
151 	readl_poll_timeout(pbase + XSP_U2FREQ_FMMONR1, tmp,  in u2_phy_slew_rate_calibrate()
152 			   (tmp & P2F_USB_FM_VALID), 10, 200);  in u2_phy_slew_rate_calibrate()
157 	tmp = readl(pbase + XSP_U2FREQ_FMCR0);  in u2_phy_slew_rate_calibrate()
158 	tmp &= ~P2F_RG_FREQDET_EN;  in u2_phy_slew_rate_calibrate()
159 	writel(tmp, pbase + XSP_U2FREQ_FMCR0);  in u2_phy_slew_rate_calibrate()
162 	tmp = readl(pbase + XSP_U2FREQ_FMMONR1);  in u2_phy_slew_rate_calibrate()
163 	tmp &= ~P2F_RG_FRCK_EN;  in u2_phy_slew_rate_calibrate()
164 	writel(tmp, pbase + XSP_U2FREQ_FMMONR1);  in u2_phy_slew_rate_calibrate()
168 		tmp = xsphy->src_ref_clk * xsphy->src_coef;  in u2_phy_slew_rate_calibrate()
169 		tmp = (tmp * XSP_FM_DET_CYCLE_CNT) / fm_out;  in u2_phy_slew_rate_calibrate()
170 		calib_val = DIV_ROUND_CLOSEST(tmp, XSP_SR_COEF_DIVISOR);  in u2_phy_slew_rate_calibrate()
180 	tmp = readl(pbase + XSP_USBPHYACR5);  in u2_phy_slew_rate_calibrate()
181 	tmp &= ~P2A5_RG_HSTX_SRCTRL;  in u2_phy_slew_rate_calibrate()
182 	tmp |= P2A5_RG_HSTX_SRCTRL_VAL(calib_val);  in u2_phy_slew_rate_calibrate()
183 	writel(tmp, pbase + XSP_USBPHYACR5);  in u2_phy_slew_rate_calibrate()
186 	tmp = readl(pbase + XSP_USBPHYACR5);  in u2_phy_slew_rate_calibrate()
187 	tmp &= ~P2A5_RG_HSTX_SRCAL_EN;  in u2_phy_slew_rate_calibrate()
188 	writel(tmp, pbase + XSP_USBPHYACR5);  in u2_phy_slew_rate_calibrate()
195 	u32 tmp;  in u2_phy_instance_init()  local
198 	tmp = readl(pbase + XSP_USBPHYACR6);  in u2_phy_instance_init()
199 	tmp &= ~P2A6_RG_BC11_SW_EN;  in u2_phy_instance_init()
200 	writel(tmp, pbase + XSP_USBPHYACR6);  in u2_phy_instance_init()
202 	tmp = readl(pbase + XSP_USBPHYACR0);  in u2_phy_instance_init()
203 	tmp |= P2A0_RG_INTR_EN;  in u2_phy_instance_init()
204 	writel(tmp, pbase + XSP_USBPHYACR0);  in u2_phy_instance_init()
212 	u32 tmp;  in u2_phy_instance_power_on()  local
214 	tmp = readl(pbase + XSP_USBPHYACR6);  in u2_phy_instance_power_on()
215 	tmp |= P2A6_RG_OTG_VBUSCMP_EN;  in u2_phy_instance_power_on()
216 	writel(tmp, pbase + XSP_USBPHYACR6);  in u2_phy_instance_power_on()
218 	tmp = readl(pbase + XSP_U2PHYDTM1);  in u2_phy_instance_power_on()
219 	tmp |= P2D_RG_VBUSVALID | P2D_RG_AVALID;  in u2_phy_instance_power_on()
220 	tmp &= ~P2D_RG_SESSEND;  in u2_phy_instance_power_on()
221 	writel(tmp, pbase + XSP_U2PHYDTM1);  in u2_phy_instance_power_on()
231 	u32 tmp;  in u2_phy_instance_power_off()  local
233 	tmp = readl(pbase + XSP_USBPHYACR6);  in u2_phy_instance_power_off()
234 	tmp &= ~P2A6_RG_OTG_VBUSCMP_EN;  in u2_phy_instance_power_off()
235 	writel(tmp, pbase + XSP_USBPHYACR6);  in u2_phy_instance_power_off()
237 	tmp = readl(pbase + XSP_U2PHYDTM1);  in u2_phy_instance_power_off()
238 	tmp &= ~(P2D_RG_VBUSVALID | P2D_RG_AVALID);  in u2_phy_instance_power_off()
239 	tmp |= P2D_RG_SESSEND;  in u2_phy_instance_power_off()
240 	writel(tmp, pbase + XSP_U2PHYDTM1);  in u2_phy_instance_power_off()
249 	u32 tmp;  in u2_phy_instance_set_mode()  local
251 	tmp = readl(inst->port_base + XSP_U2PHYDTM1);  in u2_phy_instance_set_mode()
254 		tmp |= P2D_FORCE_IDDIG | P2D_RG_IDDIG;  in u2_phy_instance_set_mode()
257 		tmp |= P2D_FORCE_IDDIG;  in u2_phy_instance_set_mode()
258 		tmp &= ~P2D_RG_IDDIG;  in u2_phy_instance_set_mode()
261 		tmp &= ~(P2D_FORCE_IDDIG | P2D_RG_IDDIG);  in u2_phy_instance_set_mode()
266 	writel(tmp, inst->port_base + XSP_U2PHYDTM1);  in u2_phy_instance_set_mode()
309 	u32 tmp;  in u2_phy_props_set()  local
312 		tmp = readl(pbase + XSP_USBPHYACR1);  in u2_phy_props_set()
313 		tmp &= ~P2A1_RG_INTR_CAL;  in u2_phy_props_set()
314 		tmp |= P2A1_RG_INTR_CAL_VAL(inst->efuse_intr);  in u2_phy_props_set()
315 		writel(tmp, pbase + XSP_USBPHYACR1);  in u2_phy_props_set()
319 		tmp = readl(pbase + XSP_USBPHYACR5);  in u2_phy_props_set()
320 		tmp &= ~P2A5_RG_HSTX_SRCTRL;  in u2_phy_props_set()
321 		tmp |= P2A5_RG_HSTX_SRCTRL_VAL(inst->eye_src);  in u2_phy_props_set()
322 		writel(tmp, pbase + XSP_USBPHYACR5);  in u2_phy_props_set()
326 		tmp = readl(pbase + XSP_USBPHYACR1);  in u2_phy_props_set()
327 		tmp &= ~P2A1_RG_VRT_SEL;  in u2_phy_props_set()
328 		tmp |= P2A1_RG_VRT_SEL_VAL(inst->eye_vrt);  in u2_phy_props_set()
329 		writel(tmp, pbase + XSP_USBPHYACR1);  in u2_phy_props_set()
333 		tmp = readl(pbase + XSP_USBPHYACR1);  in u2_phy_props_set()
334 		tmp &= ~P2A1_RG_TERM_SEL;  in u2_phy_props_set()
335 		tmp |= P2A1_RG_TERM_SEL_VAL(inst->eye_term);  in u2_phy_props_set()
336 		writel(tmp, pbase + XSP_USBPHYACR1);  in u2_phy_props_set()
344 	u32 tmp;  in u3_phy_props_set()  local
347 		tmp = readl(xsphy->glb_base + SSPXTP_PHYA_GLB_00);  in u3_phy_props_set()
348 		tmp &= ~RG_XTP_GLB_BIAS_INTR_CTRL;  in u3_phy_props_set()
349 		tmp |= RG_XTP_GLB_BIAS_INTR_CTRL_VAL(inst->efuse_intr);  in u3_phy_props_set()
350 		writel(tmp, xsphy->glb_base + SSPXTP_PHYA_GLB_00);  in u3_phy_props_set()
354 		tmp = readl(pbase + SSPXTP_PHYA_LN_04);  in u3_phy_props_set()
355 		tmp &= ~RG_XTP_LN0_TX_IMPSEL;  in u3_phy_props_set()
356 		tmp |= RG_XTP_LN0_TX_IMPSEL_VAL(inst->efuse_tx_imp);  in u3_phy_props_set()
357 		writel(tmp, pbase + SSPXTP_PHYA_LN_04);  in u3_phy_props_set()
361 		tmp = readl(pbase + SSPXTP_PHYA_LN_14);  in u3_phy_props_set()
362 		tmp &= ~RG_XTP_LN0_RX_IMPSEL;  in u3_phy_props_set()
363 		tmp |= RG_XTP_LN0_RX_IMPSEL_VAL(inst->efuse_rx_imp);  in u3_phy_props_set()
364 		writel(tmp, pbase + SSPXTP_PHYA_LN_14);  in u3_phy_props_set()