63 	u16 *cap;  in pci_save_dpc_state()  local
76 	cap = (u16 *)&save_state->cap.data[0];  in pci_save_dpc_state()
77 	pci_read_config_word(dev, dpc->cap_pos + PCI_EXP_DPC_CTL, cap);  in pci_save_dpc_state()
84 	u16 *cap;  in pci_restore_dpc_state()  local
97 	cap = (u16 *)&save_state->cap.data[0];  in pci_restore_dpc_state()
98 	pci_write_config_word(dev, dpc->cap_pos + PCI_EXP_DPC_CTL, *cap);  in pci_restore_dpc_state()
105 	u16 cap = dpc->cap_pos, status;  in dpc_wait_rp_inactive()  local
107 	pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status);  in dpc_wait_rp_inactive()
111 		pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status);  in dpc_wait_rp_inactive()
123 	u16 cap;  in dpc_reset_link()  local
130 	cap = dpc->cap_pos;  in dpc_reset_link()
141 	pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS,  in dpc_reset_link()
153 	u16 cap = dpc->cap_pos, dpc_status, first_error;  in dpc_process_rp_pio_error()  local
157 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_STATUS, &status);  in dpc_process_rp_pio_error()
158 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_MASK, &mask);  in dpc_process_rp_pio_error()
162 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_SEVERITY, &sev);  in dpc_process_rp_pio_error()
163 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_SYSERROR, &syserr);  in dpc_process_rp_pio_error()
164 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_EXCEPTION, &exc);  in dpc_process_rp_pio_error()
169 	pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &dpc_status);  in dpc_process_rp_pio_error()
180 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG,  in dpc_process_rp_pio_error()
182 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG + 4,  in dpc_process_rp_pio_error()
184 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG + 8,  in dpc_process_rp_pio_error()
186 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG + 12,  in dpc_process_rp_pio_error()
193 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_IMPSPEC_LOG, &log);  in dpc_process_rp_pio_error()
198 			cap + PCI_EXP_DPC_RP_PIO_TLPPREFIX_LOG, &prefix);  in dpc_process_rp_pio_error()
202 	pci_write_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_STATUS, status);  in dpc_process_rp_pio_error()
232 	u16 cap = dpc->cap_pos, status, source, reason, ext_reason;  in dpc_handler()  local
234 	pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status);  in dpc_handler()
235 	pci_read_config_word(pdev, cap + PCI_EXP_DPC_SOURCE_ID, &source);  in dpc_handler()
271 	u16 cap = dpc->cap_pos, status;  in dpc_irq()  local
273 	pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status);  in dpc_irq()
278 	pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS,  in dpc_irq()
292 	u16 ctl, cap;  in dpc_probe()  local
314 	pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CAP, &cap);  in dpc_probe()
317 	dpc->rp_extensions = (cap & PCI_EXP_DPC_CAP_RP_EXT);  in dpc_probe()
319 		dpc->rp_log_size = (cap & PCI_EXP_DPC_RP_PIO_LOG_SIZE) >> 8;  in dpc_probe()
331 		 cap & PCI_EXP_DPC_IRQ, FLAG(cap, PCI_EXP_DPC_CAP_RP_EXT),  in dpc_probe()
332 		 FLAG(cap, PCI_EXP_DPC_CAP_POISONED_TLP),  in dpc_probe()
333 		 FLAG(cap, PCI_EXP_DPC_CAP_SW_TRIGGER), dpc->rp_log_size,  in dpc_probe()
334 		 FLAG(cap, PCI_EXP_DPC_CAP_DL_ACTIVE));  in dpc_probe()