830 	if (!dev->pm_cap)  in pci_raw_set_power_state()
853 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_raw_set_power_state()
880 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);  in pci_raw_set_power_state()
891 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_raw_set_power_state()
936 	} else if (dev->pm_cap) {  in pci_update_current_state()
939 		pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_update_current_state()
977 	if (error && !dev->pm_cap) /* Fall back to PCI_D0 */  in pci_platform_power_transition()
1167 	if (!dev->pm_cap)  in pci_choose_state()
1675 	if (dev->pm_cap) {  in pci_enable_device_flags()
1677 		pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_enable_device_flags()
2004 	if (!dev->pm_cap)  in pci_check_pme_status()
2007 	pmcsr_pos = dev->pm_cap + PCI_PM_CTRL;  in pci_check_pme_status()
2063 	if (!dev->pm_cap)  in pci_pme_capable()
2113 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in __pci_pme_active()
2119 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);  in __pci_pme_active()
2133 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_pme_restore()
2141 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);  in pci_pme_restore()
2349 	if (!dev->pm_cap)  in pci_target_state()
2796 	dev->pm_cap = 0;  in pci_pm_init()
2812 	dev->pm_cap = pm;  in pci_pm_init()
4583 	if (!dev->pm_cap || dev->dev_flags & PCI_DEV_FLAGS_NO_PM_RESET)  in pci_pm_reset()
4586 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &csr);  in pci_pm_reset()
4598 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);  in pci_pm_reset()
4603 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);  in pci_pm_reset()