341 	} ectl;  member
614 	value |= soc->ectl.regs.rp_ectl_2_r1;  in tegra_pcie_program_ectl_settings()
619 	value |= soc->ectl.regs.rp_ectl_4_r1 <<  in tegra_pcie_program_ectl_settings()
625 	value |= soc->ectl.regs.rp_ectl_5_r1;  in tegra_pcie_program_ectl_settings()
630 	value |= soc->ectl.regs.rp_ectl_6_r1;  in tegra_pcie_program_ectl_settings()
635 	value |= soc->ectl.regs.rp_ectl_2_r2;  in tegra_pcie_program_ectl_settings()
640 	value |= soc->ectl.regs.rp_ectl_4_r2 <<  in tegra_pcie_program_ectl_settings()
646 	value |= soc->ectl.regs.rp_ectl_5_r2;  in tegra_pcie_program_ectl_settings()
651 	value |= soc->ectl.regs.rp_ectl_6_r2;  in tegra_pcie_program_ectl_settings()
735 	if (soc->ectl.enable)  in tegra_pcie_port_enable()
2518 	.ectl.enable = false,
2547 	.ectl.enable = false,
2571 	.ectl.enable = false,
2595 	.ectl = {
2637 	.ectl.enable = false,