Lines Matching refs:physport

141 	const struct parport_pc_private *priv = p->physport->private_data;  in change_mode()
161 unsigned long expire = jiffies + p->physport->cad->timeout; in change_mode()
248 const struct parport_pc_private *priv = p->physport->private_data; in parport_pc_save_state()
257 struct parport_pc_private *priv = p->physport->private_data; in parport_pc_restore_state()
477 unsigned long expire = jiffies + port->physport->cad->timeout; in parport_pc_fifo_write_block_pio()
480 const struct parport_pc_private *priv = port->physport->private_data; in parport_pc_fifo_write_block_pio()
483 port = port->physport; in parport_pc_fifo_write_block_pio()
575 const struct parport_pc_private *priv = port->physport->private_data; in parport_pc_fifo_write_block_dma()
576 struct device *dev = port->physport->dev; in parport_pc_fifo_write_block_dma()
598 port = port->physport; in parport_pc_fifo_write_block_dma()
609 unsigned long expire = jiffies + port->physport->cad->timeout; in parport_pc_fifo_write_block_dma()
716 const struct parport_pc_private *priv = port->physport->private_data; in parport_pc_compat_write_block_pio()
720 if (port->physport->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK) in parport_pc_compat_write_block_pio()
732 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; in parport_pc_compat_write_block_pio()
777 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_pc_compat_write_block_pio()
791 const struct parport_pc_private *priv = port->physport->private_data; in parport_pc_ecp_write_block_pio()
795 if (port->physport->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK) in parport_pc_ecp_write_block_pio()
800 if (port->physport->ieee1284.phase != IEEE1284_PH_FWD_IDLE) { in parport_pc_ecp_write_block_pio()
828 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; in parport_pc_ecp_write_block_pio()
892 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_pc_ecp_write_block_pio()
2293 dma_free_coherent(p->physport->dev, PAGE_SIZE, in parport_pc_unregister_port()