137 #define READ_REG32(addr) readl(addr)  macro
207     error_config = READ_REG32(d->hba.base_addr + LBA_ERROR_CONFIG);		\
210     status_control = READ_REG32(d->hba.base_addr + LBA_STAT_CTL);		\
216 	arb_mask = READ_REG32(d->hba.base_addr + LBA_ARB_MASK);		\
242     lba_t32 = READ_REG32((d)->hba.base_addr + LBA_PCI_CFG_ADDR);	\
252     lba_t32 = READ_REG32((d)->hba.base_addr + LBA_PCI_CFG_ADDR);	\
290     error_status = READ_REG32(base + LBA_ERROR_STATUS);		\
315     lba_t32 = READ_REG32((d)->hba.base_addr + LBA_PCI_CFG_ADDR);	\
355 		case 4: data = READ_REG32(data_reg); break;  in lba_rd_cfg()
397 	case 4: *data = READ_REG32(data_reg); break;  in elroy_cfg_read()
464 	lba_t32 = READ_REG32(d->hba.base_addr + LBA_PCI_CFG_ADDR);  in elroy_cfg_write()
499 		*data = READ_REG32(data_reg);             break;  in mercury_cfg_read()
1083 				lba_len = ~READ_REG32(lba_dev->hba.base_addr  in lba_pat_resources()
1186 	lba_num = READ_REG32(lba_dev->hba.base_addr + LBA_FW_SCRATCH);  in lba_legacy_resources()
1268 	r->start = READ_REG32(lba_dev->hba.base_addr + LBA_LMMIO_BASE);  in lba_legacy_resources()
1276 		rsize = ~ READ_REG32(lba_dev->hba.base_addr + LBA_LMMIO_MASK);  in lba_legacy_resources()
1314 	r->start = READ_REG32(lba_dev->hba.base_addr + LBA_ELMMIO_BASE);  in lba_legacy_resources()
1322 		rsize = READ_REG32(lba_dev->hba.base_addr + LBA_ELMMIO_MASK);  in lba_legacy_resources()
1332 	r->start = READ_REG32(lba_dev->hba.base_addr + LBA_IOS_BASE) & ~1L;  in lba_legacy_resources()
1333 …r->end   = r->start + (READ_REG32(lba_dev->hba.base_addr + LBA_IOS_MASK) ^ (HBA_PORT_SPACE_SIZE - …  in lba_legacy_resources()
1391 	bus_reset = READ_REG32(d->hba.base_addr + LBA_STAT_CTL + 4) & 1;  in lba_hw_init()
1396 	stat = READ_REG32(d->hba.base_addr + LBA_ERROR_CONFIG);  in lba_hw_init()
1418         stat = READ_REG32(d->hba.base_addr + LBA_STAT_CTL);  in lba_hw_init()
1433 	if (0 == READ_REG32(d->hba.base_addr + LBA_ARB_MASK)) {  in lba_hw_init()
1483 	func_class = READ_REG32(addr + LBA_FCLASS);  in lba_driver_probe()