Lines Matching refs:ctrl_config
2089 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; in nvme_disable_ctrl()
2090 ctrl->ctrl_config &= ~NVME_CC_ENABLE; in nvme_disable_ctrl()
2092 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); in nvme_disable_ctrl()
2129 ctrl->ctrl_config = NVME_CC_CSS_NVM; in nvme_enable_ctrl()
2130 ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT; in nvme_enable_ctrl()
2131 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; in nvme_enable_ctrl()
2132 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; in nvme_enable_ctrl()
2133 ctrl->ctrl_config |= NVME_CC_ENABLE; in nvme_enable_ctrl()
2135 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); in nvme_enable_ctrl()
2148 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; in nvme_shutdown_ctrl()
2149 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; in nvme_shutdown_ctrl()
2151 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); in nvme_shutdown_ctrl()
3847 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); in nvme_ctrl_pp_status()