Lines Matching refs:rtwdev
17 static void rtw8822b_config_trx_mode(struct rtw_dev *rtwdev, u8 tx_path,
26 static int rtw8822b_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) in rtw8822b_read_efuse() argument
28 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_read_efuse()
50 switch (rtw_hci_type(rtwdev)) { in rtw8822b_read_efuse()
62 static void rtw8822b_phy_rfe_init(struct rtw_dev *rtwdev) in rtw8822b_phy_rfe_init() argument
65 rtw_write32_mask(rtwdev, 0x64, BIT(29) | BIT(28), 0x3); in rtw8822b_phy_rfe_init()
66 rtw_write32_mask(rtwdev, 0x4c, BIT(26) | BIT(25), 0x0); in rtw8822b_phy_rfe_init()
67 rtw_write32_mask(rtwdev, 0x40, BIT(2), 0x1); in rtw8822b_phy_rfe_init()
70 rtw_write32_mask(rtwdev, 0x1990, 0x3f, 0x30); in rtw8822b_phy_rfe_init()
71 rtw_write32_mask(rtwdev, 0x1990, (BIT(11) | BIT(10)), 0x3); in rtw8822b_phy_rfe_init()
74 rtw_write32_mask(rtwdev, 0x974, 0x3f, 0x3f); in rtw8822b_phy_rfe_init()
75 rtw_write32_mask(rtwdev, 0x974, (BIT(11) | BIT(10)), 0x3); in rtw8822b_phy_rfe_init()
78 static void rtw8822b_phy_set_param(struct rtw_dev *rtwdev) in rtw8822b_phy_set_param() argument
80 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_phy_set_param()
85 rtw_write8_set(rtwdev, REG_SYS_FUNC_EN, in rtw8822b_phy_set_param()
87 rtw_write8_set(rtwdev, REG_RF_CTRL, in rtw8822b_phy_set_param()
89 rtw_write32_set(rtwdev, REG_WLRF1, BIT_WLRF1_BBRF_EN); in rtw8822b_phy_set_param()
92 rtw_write32_clr(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8822b_phy_set_param()
94 rtw_phy_load_tables(rtwdev); in rtw8822b_phy_set_param()
96 crystal_cap = rtwdev->efuse.crystal_cap & 0x3F; in rtw8822b_phy_set_param()
97 rtw_write32_mask(rtwdev, 0x24, 0x7e000000, crystal_cap); in rtw8822b_phy_set_param()
98 rtw_write32_mask(rtwdev, 0x28, 0x7e, crystal_cap); in rtw8822b_phy_set_param()
101 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8822b_phy_set_param()
104 rtw8822b_config_trx_mode(rtwdev, hal->antenna_tx, hal->antenna_rx, in rtw8822b_phy_set_param()
106 rtw_phy_init(rtwdev); in rtw8822b_phy_set_param()
108 rtw8822b_phy_rfe_init(rtwdev); in rtw8822b_phy_set_param()
163 static int rtw8822b_mac_init(struct rtw_dev *rtwdev) in rtw8822b_mac_init() argument
168 rtw_write8_clr(rtwdev, REG_SW_AMPDU_BURST_MODE_CTRL, BIT_PRE_TX_CMD); in rtw8822b_mac_init()
169 rtw_write8(rtwdev, REG_AMPDU_MAX_TIME_V1, WLAN_AMPDU_MAX_TIME); in rtw8822b_mac_init()
170 rtw_write8_set(rtwdev, REG_TX_HANG_CTRL, BIT_EN_EOF_V1); in rtw8822b_mac_init()
174 rtw_write32(rtwdev, REG_PROT_MODE_CTRL, value32); in rtw8822b_mac_init()
175 rtw_write16(rtwdev, REG_BAR_MODE_CTRL + 2, in rtw8822b_mac_init()
177 rtw_write8(rtwdev, REG_FAST_EDCA_VOVI_SETTING, FAST_EDCA_VO_TH); in rtw8822b_mac_init()
178 rtw_write8(rtwdev, REG_FAST_EDCA_VOVI_SETTING + 2, FAST_EDCA_VI_TH); in rtw8822b_mac_init()
179 rtw_write8(rtwdev, REG_FAST_EDCA_BEBK_SETTING, FAST_EDCA_BE_TH); in rtw8822b_mac_init()
180 rtw_write8(rtwdev, REG_FAST_EDCA_BEBK_SETTING + 2, FAST_EDCA_BK_TH); in rtw8822b_mac_init()
182 rtw_write8_clr(rtwdev, REG_TIMER0_SRC_SEL, BIT_TSFT_SEL_TIMER0); in rtw8822b_mac_init()
183 rtw_write16(rtwdev, REG_TXPAUSE, 0x0000); in rtw8822b_mac_init()
184 rtw_write8(rtwdev, REG_SLOT, WLAN_SLOT_TIME); in rtw8822b_mac_init()
185 rtw_write8(rtwdev, REG_PIFS, WLAN_PIFS_TIME); in rtw8822b_mac_init()
186 rtw_write32(rtwdev, REG_SIFS, WLAN_SIFS_CFG); in rtw8822b_mac_init()
187 rtw_write16(rtwdev, REG_EDCA_VO_PARAM + 2, WLAN_VO_TXOP_LIMIT); in rtw8822b_mac_init()
188 rtw_write16(rtwdev, REG_EDCA_VI_PARAM + 2, WLAN_VI_TXOP_LIMIT); in rtw8822b_mac_init()
189 rtw_write32(rtwdev, REG_RD_NAV_NXT, WLAN_NAV_CFG); in rtw8822b_mac_init()
190 rtw_write16(rtwdev, REG_RXTSF_OFFSET_CCK, WLAN_RX_TSF_CFG); in rtw8822b_mac_init()
192 rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); in rtw8822b_mac_init()
194 rtw_write32(rtwdev, REG_TBTT_PROHIBIT, WLAN_TBTT_TIME); in rtw8822b_mac_init()
195 rtw_write8(rtwdev, REG_DRVERLYINT, WLAN_DRV_EARLY_INT); in rtw8822b_mac_init()
196 rtw_write8(rtwdev, REG_BCNDMATIM, WLAN_BCN_DMA_TIME); in rtw8822b_mac_init()
197 rtw_write8_clr(rtwdev, REG_TX_PTCL_CTRL + 1, BIT_SIFS_BK_EN >> 8); in rtw8822b_mac_init()
199 rtw_write32(rtwdev, REG_RXFLTMAP0, WLAN_RX_FILTER0); in rtw8822b_mac_init()
200 rtw_write16(rtwdev, REG_RXFLTMAP2, WLAN_RX_FILTER2); in rtw8822b_mac_init()
201 rtw_write32(rtwdev, REG_RCR, WLAN_RCR_CFG); in rtw8822b_mac_init()
202 rtw_write8(rtwdev, REG_RX_PKT_LIMIT, WLAN_RXPKT_MAX_SZ_512); in rtw8822b_mac_init()
203 rtw_write8(rtwdev, REG_TCR + 2, WLAN_TX_FUNC_CFG2); in rtw8822b_mac_init()
204 rtw_write8(rtwdev, REG_TCR + 1, WLAN_TX_FUNC_CFG1); in rtw8822b_mac_init()
205 rtw_write32(rtwdev, REG_WMAC_OPTION_FUNCTION + 8, WLAN_MAC_OPT_FUNC2); in rtw8822b_mac_init()
206 rtw_write8(rtwdev, REG_WMAC_OPTION_FUNCTION + 4, WLAN_MAC_OPT_NORM_FUNC1); in rtw8822b_mac_init()
211 static void rtw8822b_set_channel_rfe_efem(struct rtw_dev *rtwdev, u8 channel) in rtw8822b_set_channel_rfe_efem() argument
213 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_set_channel_rfe_efem()
217 rtw_write32s_mask(rtwdev, REG_RFESEL0, 0xffffff, 0x705770); in rtw8822b_set_channel_rfe_efem()
218 rtw_write32s_mask(rtwdev, REG_RFESEL8, MASKBYTE1, 0x57); in rtw8822b_set_channel_rfe_efem()
219 rtw_write32s_mask(rtwdev, REG_RFECTL, BIT(4), 0); in rtw8822b_set_channel_rfe_efem()
221 rtw_write32s_mask(rtwdev, REG_RFESEL0, 0xffffff, 0x177517); in rtw8822b_set_channel_rfe_efem()
222 rtw_write32s_mask(rtwdev, REG_RFESEL8, MASKBYTE1, 0x75); in rtw8822b_set_channel_rfe_efem()
223 rtw_write32s_mask(rtwdev, REG_RFECTL, BIT(5), 0); in rtw8822b_set_channel_rfe_efem()
226 rtw_write32s_mask(rtwdev, REG_RFEINV, BIT(11) | BIT(10) | 0x3f, 0x0); in rtw8822b_set_channel_rfe_efem()
231 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa501); in rtw8822b_set_channel_rfe_efem()
234 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa500); in rtw8822b_set_channel_rfe_efem()
237 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa005); in rtw8822b_set_channel_rfe_efem()
241 static void rtw8822b_set_channel_rfe_ifem(struct rtw_dev *rtwdev, u8 channel) in rtw8822b_set_channel_rfe_ifem() argument
243 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_set_channel_rfe_ifem()
248 rtw_write32s_mask(rtwdev, REG_RFESEL0, 0xffffff, 0x745774); in rtw8822b_set_channel_rfe_ifem()
249 rtw_write32s_mask(rtwdev, REG_RFESEL8, MASKBYTE1, 0x57); in rtw8822b_set_channel_rfe_ifem()
252 rtw_write32s_mask(rtwdev, REG_RFESEL0, 0xffffff, 0x477547); in rtw8822b_set_channel_rfe_ifem()
253 rtw_write32s_mask(rtwdev, REG_RFESEL8, MASKBYTE1, 0x75); in rtw8822b_set_channel_rfe_ifem()
256 rtw_write32s_mask(rtwdev, REG_RFEINV, BIT(11) | BIT(10) | 0x3f, 0x0); in rtw8822b_set_channel_rfe_ifem()
262 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa501); in rtw8822b_set_channel_rfe_ifem()
265 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa500); in rtw8822b_set_channel_rfe_ifem()
268 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa005); in rtw8822b_set_channel_rfe_ifem()
271 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa5a5); in rtw8822b_set_channel_rfe_ifem()
320 void (*rtw_set_channel_rfe)(struct rtw_dev *rtwdev, u8 channel);
343 static void rtw8822b_set_channel_cca(struct rtw_dev *rtwdev, u8 channel, u8 bw, in rtw8822b_set_channel_cca() argument
346 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_set_channel_cca()
347 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_set_channel_cca()
401 rtw_write32_mask(rtwdev, REG_CCASEL, MASKDWORD, reg82c); in rtw8822b_set_channel_cca()
402 rtw_write32_mask(rtwdev, REG_PDMFTH, MASKDWORD, reg830); in rtw8822b_set_channel_cca()
403 rtw_write32_mask(rtwdev, REG_CCA2ND, MASKDWORD, reg838); in rtw8822b_set_channel_cca()
406 rtw_write32_mask(rtwdev, REG_L1WT, MASKDWORD, 0x9194b2b9); in rtw8822b_set_channel_cca()
411 rtw_write32_mask(rtwdev, REG_CCA2ND, 0xf0, 0x4); in rtw8822b_set_channel_cca()
422 static void rtw8822b_set_channel_rf(struct rtw_dev *rtwdev, u8 channel, u8 bw) in rtw8822b_set_channel_rf() argument
437 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_set_channel_rf()
440 rf_reg18 = rtw_read_rf(rtwdev, RF_PATH_A, 0x18, RFREG_MASK); in rtw8822b_set_channel_rf()
478 rtw_write_rf(rtwdev, RF_PATH_A, RF_MALSEL, RFBE_MASK, rf_reg_be); in rtw8822b_set_channel_rf()
482 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTDBG, BIT(18), 0x1); in rtw8822b_set_channel_rf()
484 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTDBG, BIT(18), 0x0); in rtw8822b_set_channel_rf()
486 rtw_write_rf(rtwdev, RF_PATH_A, 0x18, RFREG_MASK, rf_reg18); in rtw8822b_set_channel_rf()
488 rtw_write_rf(rtwdev, RF_PATH_B, 0x18, RFREG_MASK, rf_reg18); in rtw8822b_set_channel_rf()
490 rtw_write_rf(rtwdev, RF_PATH_A, RF_XTALX2, BIT(19), 0); in rtw8822b_set_channel_rf()
491 rtw_write_rf(rtwdev, RF_PATH_A, RF_XTALX2, BIT(19), 1); in rtw8822b_set_channel_rf()
499 static void rtw8822b_toggle_igi(struct rtw_dev *rtwdev) in rtw8822b_toggle_igi() argument
501 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_toggle_igi()
504 igi = rtw_read32_mask(rtwdev, REG_RXIGI_A, 0x7f); in rtw8822b_toggle_igi()
505 rtw_write32_mask(rtwdev, REG_RXIGI_A, 0x7f, igi - 2); in rtw8822b_toggle_igi()
506 rtw_write32_mask(rtwdev, REG_RXIGI_A, 0x7f, igi); in rtw8822b_toggle_igi()
507 rtw_write32_mask(rtwdev, REG_RXIGI_B, 0x7f, igi - 2); in rtw8822b_toggle_igi()
508 rtw_write32_mask(rtwdev, REG_RXIGI_B, 0x7f, igi); in rtw8822b_toggle_igi()
510 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, 0x0); in rtw8822b_toggle_igi()
511 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, in rtw8822b_toggle_igi()
515 static void rtw8822b_set_channel_rxdfir(struct rtw_dev *rtwdev, u8 bw) in rtw8822b_set_channel_rxdfir() argument
519 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x1); in rtw8822b_set_channel_rxdfir()
520 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x0); in rtw8822b_set_channel_rxdfir()
521 rtw_write32s_mask(rtwdev, REG_TXDFIR, BIT(31), 0x0); in rtw8822b_set_channel_rxdfir()
524 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2); in rtw8822b_set_channel_rxdfir()
525 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x1); in rtw8822b_set_channel_rxdfir()
526 rtw_write32s_mask(rtwdev, REG_TXDFIR, BIT(31), 0x0); in rtw8822b_set_channel_rxdfir()
529 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2); in rtw8822b_set_channel_rxdfir()
530 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x2); in rtw8822b_set_channel_rxdfir()
531 rtw_write32s_mask(rtwdev, REG_TXDFIR, BIT(31), 0x1); in rtw8822b_set_channel_rxdfir()
535 static void rtw8822b_set_channel_bb(struct rtw_dev *rtwdev, u8 channel, u8 bw, in rtw8822b_set_channel_bb() argument
538 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_set_channel_bb()
543 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x1); in rtw8822b_set_channel_bb()
544 rtw_write32_mask(rtwdev, REG_CCK_CHECK, BIT(7), 0x0); in rtw8822b_set_channel_bb()
545 rtw_write32_mask(rtwdev, REG_ENTXCCK, BIT(18), 0x0); in rtw8822b_set_channel_bb()
546 rtw_write32_mask(rtwdev, REG_RXCCAMSK, 0x0000FC00, 15); in rtw8822b_set_channel_bb()
548 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x0); in rtw8822b_set_channel_bb()
549 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x96a); in rtw8822b_set_channel_bb()
551 rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, 0x00006577); in rtw8822b_set_channel_bb()
552 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x0000); in rtw8822b_set_channel_bb()
554 rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, 0x384f6577); in rtw8822b_set_channel_bb()
555 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x1525); in rtw8822b_set_channel_bb()
558 rtw_write32_mask(rtwdev, REG_RFEINV, 0x300, 0x2); in rtw8822b_set_channel_bb()
560 rtw_write32_mask(rtwdev, REG_ENTXCCK, BIT(18), 0x1); in rtw8822b_set_channel_bb()
561 rtw_write32_mask(rtwdev, REG_CCK_CHECK, BIT(7), 0x1); in rtw8822b_set_channel_bb()
562 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x0); in rtw8822b_set_channel_bb()
563 rtw_write32_mask(rtwdev, REG_RXCCAMSK, 0x0000FC00, 34); in rtw8822b_set_channel_bb()
566 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x1); in rtw8822b_set_channel_bb()
568 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x2); in rtw8822b_set_channel_bb()
570 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x3); in rtw8822b_set_channel_bb()
573 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x494); in rtw8822b_set_channel_bb()
575 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x453); in rtw8822b_set_channel_bb()
577 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x452); in rtw8822b_set_channel_bb()
579 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x412); in rtw8822b_set_channel_bb()
581 rtw_write32_mask(rtwdev, 0xcbc, 0x300, 0x1); in rtw8822b_set_channel_bb()
587 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8822b_set_channel_bb()
590 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
592 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1); in rtw8822b_set_channel_bb()
596 rtw_write32_set(rtwdev, REG_RXSB, BIT(4)); in rtw8822b_set_channel_bb()
598 rtw_write32_clr(rtwdev, REG_RXSB, BIT(4)); in rtw8822b_set_channel_bb()
600 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8822b_set_channel_bb()
603 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
605 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1); in rtw8822b_set_channel_bb()
608 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8822b_set_channel_bb()
611 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
613 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1); in rtw8822b_set_channel_bb()
616 rtw_write32_mask(rtwdev, REG_L1PKWT, 0x0000f000, 0x6); in rtw8822b_set_channel_bb()
617 rtw_write32_mask(rtwdev, REG_ADC40, BIT(10), 0x1); in rtw8822b_set_channel_bb()
621 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8822b_set_channel_bb()
624 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
626 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x0); in rtw8822b_set_channel_bb()
627 rtw_write32_mask(rtwdev, REG_ADC40, BIT(31), 0x1); in rtw8822b_set_channel_bb()
630 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8822b_set_channel_bb()
633 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
635 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x0); in rtw8822b_set_channel_bb()
636 rtw_write32_mask(rtwdev, REG_ADC40, BIT(31), 0x1); in rtw8822b_set_channel_bb()
641 static void rtw8822b_set_channel(struct rtw_dev *rtwdev, u8 channel, u8 bw, in rtw8822b_set_channel() argument
644 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_set_channel()
653 rtw8822b_set_channel_bb(rtwdev, channel, bw, primary_chan_idx); in rtw8822b_set_channel()
654 rtw_set_channel_mac(rtwdev, channel, bw, primary_chan_idx); in rtw8822b_set_channel()
655 rtw8822b_set_channel_rf(rtwdev, channel, bw); in rtw8822b_set_channel()
656 rtw8822b_set_channel_rxdfir(rtwdev, bw); in rtw8822b_set_channel()
657 rtw8822b_toggle_igi(rtwdev); in rtw8822b_set_channel()
658 rtw8822b_set_channel_cca(rtwdev, channel, bw, rfe_info); in rtw8822b_set_channel()
659 (*rfe_info->rtw_set_channel_rfe)(rtwdev, channel); in rtw8822b_set_channel()
662 static void rtw8822b_config_trx_mode(struct rtw_dev *rtwdev, u8 tx_path, in rtw8822b_config_trx_mode() argument
665 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_config_trx_mode()
667 u8 ch = rtwdev->hal.current_channel; in rtw8822b_config_trx_mode()
678 rtw_write32_mask(rtwdev, REG_AGCTR_A, MASKLWORD, 0x3231); in rtw8822b_config_trx_mode()
680 rtw_write32_mask(rtwdev, REG_AGCTR_A, MASKLWORD, 0x1111); in rtw8822b_config_trx_mode()
683 rtw_write32_mask(rtwdev, REG_AGCTR_B, MASKLWORD, 0x3231); in rtw8822b_config_trx_mode()
685 rtw_write32_mask(rtwdev, REG_AGCTR_B, MASKLWORD, 0x1111); in rtw8822b_config_trx_mode()
687 rtw_write32_mask(rtwdev, REG_CDDTXP, (BIT(19) | BIT(18)), 0x3); in rtw8822b_config_trx_mode()
688 rtw_write32_mask(rtwdev, REG_TXPSEL, (BIT(29) | BIT(28)), 0x1); in rtw8822b_config_trx_mode()
689 rtw_write32_mask(rtwdev, REG_TXPSEL, BIT(30), 0x1); in rtw8822b_config_trx_mode()
692 rtw_write32_mask(rtwdev, REG_CDDTXP, 0xfff00000, 0x001); in rtw8822b_config_trx_mode()
693 rtw_write32_mask(rtwdev, REG_ADCINI, 0xf0000000, 0x8); in rtw8822b_config_trx_mode()
695 rtw_write32_mask(rtwdev, REG_CDDTXP, 0xfff00000, 0x002); in rtw8822b_config_trx_mode()
696 rtw_write32_mask(rtwdev, REG_ADCINI, 0xf0000000, 0x4); in rtw8822b_config_trx_mode()
700 rtw_write32_mask(rtwdev, REG_TXPSEL1, 0xfff0, 0x01); in rtw8822b_config_trx_mode()
702 rtw_write32_mask(rtwdev, REG_TXPSEL1, 0xfff0, 0x43); in rtw8822b_config_trx_mode()
705 rtw_write32_mask(rtwdev, REG_TXPSEL, MASKBYTE0, tx_path_sel); in rtw8822b_config_trx_mode()
708 if (is_tx2_path || rtwdev->mp_mode) { in rtw8822b_config_trx_mode()
709 rtw_write32_mask(rtwdev, REG_CDDTXP, 0xfff00000, 0x043); in rtw8822b_config_trx_mode()
710 rtw_write32_mask(rtwdev, REG_ADCINI, 0xf0000000, 0xc); in rtw8822b_config_trx_mode()
714 rtw_write32_mask(rtwdev, REG_RXDESC, BIT(22), 0x0); in rtw8822b_config_trx_mode()
715 rtw_write32_mask(rtwdev, REG_RXDESC, BIT(18), 0x0); in rtw8822b_config_trx_mode()
718 rtw_write32_mask(rtwdev, REG_ADCINI, 0x0f000000, 0x0); in rtw8822b_config_trx_mode()
720 rtw_write32_mask(rtwdev, REG_ADCINI, 0x0f000000, 0x5); in rtw8822b_config_trx_mode()
723 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, rx_path_sel); in rtw8822b_config_trx_mode()
726 rtw_write32_mask(rtwdev, REG_ANTWT, BIT(16), 0x0); in rtw8822b_config_trx_mode()
727 rtw_write32_mask(rtwdev, REG_HTSTFWT, BIT(28), 0x0); in rtw8822b_config_trx_mode()
728 rtw_write32_mask(rtwdev, REG_MRC, BIT(23), 0x0); in rtw8822b_config_trx_mode()
730 rtw_write32_mask(rtwdev, REG_ANTWT, BIT(16), 0x1); in rtw8822b_config_trx_mode()
731 rtw_write32_mask(rtwdev, REG_HTSTFWT, BIT(28), 0x1); in rtw8822b_config_trx_mode()
732 rtw_write32_mask(rtwdev, REG_MRC, BIT(23), 0x1); in rtw8822b_config_trx_mode()
738 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWE, RFREG_MASK, 0x80000); in rtw8822b_config_trx_mode()
739 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWA, RFREG_MASK, 0x00001); in rtw8822b_config_trx_mode()
742 rf_reg33 = rtw_read_rf(rtwdev, RF_PATH_A, 0x33, RFREG_MASK); in rtw8822b_config_trx_mode()
751 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWE, RFREG_MASK, 0x80000); in rtw8822b_config_trx_mode()
752 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWA, RFREG_MASK, 0x00001); in rtw8822b_config_trx_mode()
753 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWD1, RFREG_MASK, 0x00034); in rtw8822b_config_trx_mode()
754 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWD0, RFREG_MASK, 0x4080c); in rtw8822b_config_trx_mode()
755 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWE, RFREG_MASK, 0x00000); in rtw8822b_config_trx_mode()
756 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWE, RFREG_MASK, 0x00000); in rtw8822b_config_trx_mode()
758 rtw8822b_toggle_igi(rtwdev); in rtw8822b_config_trx_mode()
759 rtw8822b_set_channel_cca(rtwdev, 1, RTW_CHANNEL_WIDTH_20, rfe_info); in rtw8822b_config_trx_mode()
760 (*rfe_info->rtw_set_channel_rfe)(rtwdev, ch); in rtw8822b_config_trx_mode()
763 static void query_phy_status_page0(struct rtw_dev *rtwdev, u8 *phy_status, in query_phy_status_page0() argument
777 static void query_phy_status_page1(struct rtw_dev *rtwdev, u8 *phy_status, in query_phy_status_page1() argument
806 static void query_phy_status(struct rtw_dev *rtwdev, u8 *phy_status, in query_phy_status() argument
815 query_phy_status_page0(rtwdev, phy_status, pkt_stat); in query_phy_status()
818 query_phy_status_page1(rtwdev, phy_status, pkt_stat); in query_phy_status()
821 rtw_warn(rtwdev, "unused phy status page (%d)\n", page); in query_phy_status()
826 static void rtw8822b_query_rx_desc(struct rtw_dev *rtwdev, u8 *rx_desc, in rtw8822b_query_rx_desc() argument
831 u32 desc_sz = rtwdev->chip->rx_pkt_desc_sz; in rtw8822b_query_rx_desc()
860 query_phy_status(rtwdev, phy_status, pkt_stat); in rtw8822b_query_rx_desc()
863 rtw_rx_fill_rx_status(rtwdev, pkt_stat, hdr, rx_status, phy_status); in rtw8822b_query_rx_desc()
867 rtw8822b_set_tx_power_index_by_rate(struct rtw_dev *rtwdev, u8 path, u8 rs) in rtw8822b_set_tx_power_index_by_rate() argument
869 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_set_tx_power_index_by_rate()
882 rtw_write32(rtwdev, offset_txagc[path] + rate_idx, in rtw8822b_set_tx_power_index_by_rate()
889 static void rtw8822b_set_tx_power_index(struct rtw_dev *rtwdev) in rtw8822b_set_tx_power_index() argument
891 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_set_tx_power_index()
896 rtw8822b_set_tx_power_index_by_rate(rtwdev, path, rs); in rtw8822b_set_tx_power_index()
912 static void rtw8822b_set_antenna(struct rtw_dev *rtwdev, u8 antenna_tx, in rtw8822b_set_antenna() argument
915 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_set_antenna()
917 rtw_dbg(rtwdev, RTW_DBG_PHY, "config RF path, tx=0x%x rx=0x%x\n", in rtw8822b_set_antenna()
921 rtw_info(rtwdev, "unsupport tx path, set to default path ab\n"); in rtw8822b_set_antenna()
925 rtw_info(rtwdev, "unsupport rx path, set to default path ab\n"); in rtw8822b_set_antenna()
930 rtw8822b_config_trx_mode(rtwdev, antenna_tx, antenna_rx, false); in rtw8822b_set_antenna()
933 static void rtw8822b_cfg_ldo25(struct rtw_dev *rtwdev, bool enable) in rtw8822b_cfg_ldo25() argument
937 ldo_pwr = rtw_read8(rtwdev, REG_LDO_EFUSE_CTRL + 3); in rtw8822b_cfg_ldo25()
939 rtw_write8(rtwdev, REG_LDO_EFUSE_CTRL + 3, ldo_pwr); in rtw8822b_cfg_ldo25()
942 static void rtw8822b_false_alarm_statistics(struct rtw_dev *rtwdev) in rtw8822b_false_alarm_statistics() argument
944 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8822b_false_alarm_statistics()
950 cck_enable = rtw_read32(rtwdev, 0x808) & BIT(28); in rtw8822b_false_alarm_statistics()
951 cck_fa_cnt = rtw_read16(rtwdev, 0xa5c); in rtw8822b_false_alarm_statistics()
952 ofdm_fa_cnt = rtw_read16(rtwdev, 0xf48); in rtw8822b_false_alarm_statistics()
959 crc32_cnt = rtw_read32(rtwdev, 0xf04); in rtw8822b_false_alarm_statistics()
962 crc32_cnt = rtw_read32(rtwdev, 0xf14); in rtw8822b_false_alarm_statistics()
965 crc32_cnt = rtw_read32(rtwdev, 0xf10); in rtw8822b_false_alarm_statistics()
968 crc32_cnt = rtw_read32(rtwdev, 0xf0c); in rtw8822b_false_alarm_statistics()
972 rtw_write32_set(rtwdev, 0x9a4, BIT(17)); in rtw8822b_false_alarm_statistics()
973 rtw_write32_clr(rtwdev, 0x9a4, BIT(17)); in rtw8822b_false_alarm_statistics()
974 rtw_write32_clr(rtwdev, 0xa2c, BIT(15)); in rtw8822b_false_alarm_statistics()
975 rtw_write32_set(rtwdev, 0xa2c, BIT(15)); in rtw8822b_false_alarm_statistics()
976 rtw_write32_set(rtwdev, 0xb58, BIT(0)); in rtw8822b_false_alarm_statistics()
977 rtw_write32_clr(rtwdev, 0xb58, BIT(0)); in rtw8822b_false_alarm_statistics()
980 static void rtw8822b_do_iqk(struct rtw_dev *rtwdev) in rtw8822b_do_iqk() argument
988 rtw_fw_do_iqk(rtwdev, ¶); in rtw8822b_do_iqk()
991 rf_reg = rtw_read_rf(rtwdev, RF_PATH_A, RF_DTXLOK, RFREG_MASK); in rtw8822b_do_iqk()
996 rtw_write_rf(rtwdev, RF_PATH_A, RF_DTXLOK, RFREG_MASK, 0x0); in rtw8822b_do_iqk()
998 reload = !!rtw_read32_mask(rtwdev, REG_IQKFAILMSK, BIT(16)); in rtw8822b_do_iqk()
999 iqk_fail_mask = rtw_read32_mask(rtwdev, REG_IQKFAILMSK, GENMASK(7, 0)); in rtw8822b_do_iqk()
1000 rtw_dbg(rtwdev, RTW_DBG_PHY, in rtw8822b_do_iqk()
1005 static void rtw8822b_phy_calibration(struct rtw_dev *rtwdev) in rtw8822b_phy_calibration() argument
1007 rtw8822b_do_iqk(rtwdev); in rtw8822b_phy_calibration()
1010 static void rtw8822b_coex_cfg_init(struct rtw_dev *rtwdev) in rtw8822b_coex_cfg_init() argument
1013 rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); in rtw8822b_coex_cfg_init()
1017 rtw_write8_set(rtwdev, REG_BT_TDMA_TIME, 0x05); in rtw8822b_coex_cfg_init()
1020 rtw_write8(rtwdev, REG_BT_STAT_CTRL, 0x1); in rtw8822b_coex_cfg_init()
1023 rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_BT_PTA_EN); in rtw8822b_coex_cfg_init()
1024 rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_BT_AOD_GPIO3); in rtw8822b_coex_cfg_init()
1027 rtw_write8_set(rtwdev, REG_QUEUE_CTRL, BIT_PTA_WL_TX_EN); in rtw8822b_coex_cfg_init()
1029 rtw_write8_clr(rtwdev, REG_QUEUE_CTRL, BIT_PTA_EDCCA_EN); in rtw8822b_coex_cfg_init()
1031 rtw_write8_set(rtwdev, REG_BT_COEX_V2, BIT_GNT_BT_POLARITY); in rtw8822b_coex_cfg_init()
1034 static void rtw8822b_coex_cfg_ant_switch(struct rtw_dev *rtwdev, in rtw8822b_coex_cfg_ant_switch() argument
1037 struct rtw_coex *coex = &rtwdev->coex; in rtw8822b_coex_cfg_ant_switch()
1058 rtw_write8_mask(rtwdev, REG_LED_CFG + 2, BIT_DPDT_SEL_EN >> 16, 0x0); in rtw8822b_coex_cfg_ant_switch()
1060 rtw_write8_mask(rtwdev, REG_LED_CFG + 3, BIT_DPDT_WL_SEL >> 24, 0x1); in rtw8822b_coex_cfg_ant_switch()
1062 rtw_write8_mask(rtwdev, REG_RFE_CTRL8, BIT_MASK_RFE_SEL89, 0x77); in rtw8822b_coex_cfg_ant_switch()
1076 rtw_write8_mask(rtwdev, REG_RFE_INV8, BIT_MASK_RFE_INV89, regval); in rtw8822b_coex_cfg_ant_switch()
1080 rtw_write8_mask(rtwdev, REG_LED_CFG + 2, BIT_DPDT_SEL_EN >> 16, 0x0); in rtw8822b_coex_cfg_ant_switch()
1082 rtw_write8_mask(rtwdev, REG_LED_CFG + 3, BIT_DPDT_WL_SEL >> 24, 0x1); in rtw8822b_coex_cfg_ant_switch()
1084 rtw_write8_mask(rtwdev, REG_RFE_CTRL8, BIT_MASK_RFE_SEL89, 0x66); in rtw8822b_coex_cfg_ant_switch()
1087 rtw_write8_mask(rtwdev, REG_RFE_INV8, BIT_MASK_RFE_INV89, regval); in rtw8822b_coex_cfg_ant_switch()
1091 rtw_write8_mask(rtwdev, REG_LED_CFG + 2, BIT_DPDT_SEL_EN >> 16, 0x0); in rtw8822b_coex_cfg_ant_switch()
1093 rtw_write8_mask(rtwdev, REG_LED_CFG + 3, BIT_DPDT_WL_SEL >> 24, 0x1); in rtw8822b_coex_cfg_ant_switch()
1094 rtw_write8_mask(rtwdev, REG_RFE_CTRL8, BIT_MASK_RFE_SEL89, 0x88); in rtw8822b_coex_cfg_ant_switch()
1098 rtw_write8_mask(rtwdev, REG_LED_CFG + 2, BIT_DPDT_SEL_EN >> 16, 0x1); in rtw8822b_coex_cfg_ant_switch()
1101 rtw_write8_mask(rtwdev, REG_PAD_CTRL1, BIT_SW_DPDT_SEL_DATA, regval); in rtw8822b_coex_cfg_ant_switch()
1105 rtw_write8_mask(rtwdev, REG_LED_CFG + 2, BIT_DPDT_SEL_EN >> 16, 0x0); in rtw8822b_coex_cfg_ant_switch()
1107 rtw_write8_mask(rtwdev, REG_LED_CFG + 3, BIT_DPDT_WL_SEL >> 24, 0x1); in rtw8822b_coex_cfg_ant_switch()
1111 rtw_write8_mask(rtwdev, REG_LED_CFG + 2, BIT_DPDT_SEL_EN >> 16, 0x0); in rtw8822b_coex_cfg_ant_switch()
1113 rtw_write8_mask(rtwdev, REG_LED_CFG + 3, BIT_DPDT_WL_SEL >> 24, 0x0); in rtw8822b_coex_cfg_ant_switch()
1118 static void rtw8822b_coex_cfg_gnt_fix(struct rtw_dev *rtwdev) in rtw8822b_coex_cfg_gnt_fix() argument
1122 static void rtw8822b_coex_cfg_gnt_debug(struct rtw_dev *rtwdev) in rtw8822b_coex_cfg_gnt_debug() argument
1124 rtw_write8_mask(rtwdev, REG_PAD_CTRL1 + 2, BIT_BTGP_SPI_EN >> 16, 0); in rtw8822b_coex_cfg_gnt_debug()
1125 rtw_write8_mask(rtwdev, REG_PAD_CTRL1 + 3, BIT_BTGP_JTAG_EN >> 24, 0); in rtw8822b_coex_cfg_gnt_debug()
1126 rtw_write8_mask(rtwdev, REG_GPIO_MUXCFG + 2, BIT_FSPI_EN >> 16, 0); in rtw8822b_coex_cfg_gnt_debug()
1127 rtw_write8_mask(rtwdev, REG_PAD_CTRL1 + 1, BIT_LED1DIS >> 8, 0); in rtw8822b_coex_cfg_gnt_debug()
1128 rtw_write8_mask(rtwdev, REG_SYS_SDIO_CTRL + 3, BIT_DBG_GNT_WL_BT >> 24, 0); in rtw8822b_coex_cfg_gnt_debug()
1131 static void rtw8822b_coex_cfg_rfe_type(struct rtw_dev *rtwdev) in rtw8822b_coex_cfg_rfe_type() argument
1133 struct rtw_coex *coex = &rtwdev->coex; in rtw8822b_coex_cfg_rfe_type()
1135 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_coex_cfg_rfe_type()
1138 coex_rfe->rfe_module_type = rtwdev->efuse.rfe_option; in rtw8822b_coex_cfg_rfe_type()
1150 rtw_coex_write_scbd(rtwdev, COEX_SCBD_EXTFEM, true); in rtw8822b_coex_cfg_rfe_type()
1153 rtw_coex_write_scbd(rtwdev, COEX_SCBD_EXTFEM, false); in rtw8822b_coex_cfg_rfe_type()
1165 rtw_write8(rtwdev, REG_RFE_CTRL_E, 0xff); in rtw8822b_coex_cfg_rfe_type()
1166 rtw_write8_mask(rtwdev, REG_RFESEL_CTRL + 1, 0x3, 0x0); in rtw8822b_coex_cfg_rfe_type()
1167 rtw_write8_mask(rtwdev, REG_RFE_INV16, BIT_RFE_BUF_EN, 0x0); in rtw8822b_coex_cfg_rfe_type()
1170 rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, BIT_LTE_COEX_EN, 0); in rtw8822b_coex_cfg_rfe_type()
1173 rtw_coex_write_indirect_reg(rtwdev, LTE_WL_TRX_CTRL, MASKLWORD, 0xffff); in rtw8822b_coex_cfg_rfe_type()
1176 rtw_coex_write_indirect_reg(rtwdev, LTE_BT_TRX_CTRL, MASKLWORD, 0xffff); in rtw8822b_coex_cfg_rfe_type()
1179 static void rtw8822b_coex_cfg_wl_tx_power(struct rtw_dev *rtwdev, u8 wl_pwr) in rtw8822b_coex_cfg_wl_tx_power() argument
1181 struct rtw_coex *coex = &rtwdev->coex; in rtw8822b_coex_cfg_wl_tx_power()
1198 rtw_write8_mask(rtwdev, reg_addr[i], 0xff, pwr); in rtw8822b_coex_cfg_wl_tx_power()
1201 static void rtw8822b_coex_cfg_wl_rx_gain(struct rtw_dev *rtwdev, bool low_gain) in rtw8822b_coex_cfg_wl_rx_gain() argument
1203 struct rtw_coex *coex = &rtwdev->coex; in rtw8822b_coex_cfg_wl_rx_gain()
1239 rtw_write32(rtwdev, REG_RX_GAIN_EN, wl_rx_low_gain_on[i]); in rtw8822b_coex_cfg_wl_rx_gain()
1242 rtw_write_rf(rtwdev, RF_PATH_A, RF_RCKD, 0x2, 0x1); in rtw8822b_coex_cfg_wl_rx_gain()
1243 rtw_write_rf(rtwdev, RF_PATH_A, RF_RCK, 0x3f, 0x3f); in rtw8822b_coex_cfg_wl_rx_gain()
1244 rtw_write_rf(rtwdev, RF_PATH_B, RF_RCKD, 0x2, 0x1); in rtw8822b_coex_cfg_wl_rx_gain()
1245 rtw_write_rf(rtwdev, RF_PATH_B, RF_RCK, 0x3f, 0x3f); in rtw8822b_coex_cfg_wl_rx_gain()
1248 rtw_write32(rtwdev, 0x81c, wl_rx_low_gain_off[i]); in rtw8822b_coex_cfg_wl_rx_gain()
1251 rtw_write_rf(rtwdev, RF_PATH_A, RF_RCK, 0x3f, 0x4); in rtw8822b_coex_cfg_wl_rx_gain()
1252 rtw_write_rf(rtwdev, RF_PATH_A, RF_RCKD, 0x2, 0x0); in rtw8822b_coex_cfg_wl_rx_gain()
1253 rtw_write_rf(rtwdev, RF_PATH_B, RF_RCK, 0x3f, 0x4); in rtw8822b_coex_cfg_wl_rx_gain()
1254 rtw_write_rf(rtwdev, RF_PATH_B, RF_RCKD, 0x2, 0x0); in rtw8822b_coex_cfg_wl_rx_gain()