Lines Matching refs:tx_rings
168 tx_ring = &rtwpci->tx_rings[i]; in rtw_pci_free_trx_ring()
324 tx_ring = &rtwpci->tx_rings[i]; in rtw_pci_init_trx_ring()
346 tx_ring = &rtwpci->tx_rings[i]; in rtw_pci_init_trx_ring()
398 dma = rtwpci->tx_rings[RTW_TX_QUEUE_BCN].r.dma; in rtw_pci_reset_buf_desc()
401 len = rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.len; in rtw_pci_reset_buf_desc()
402 dma = rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.dma; in rtw_pci_reset_buf_desc()
403 rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.rp = 0; in rtw_pci_reset_buf_desc()
404 rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.wp = 0; in rtw_pci_reset_buf_desc()
408 len = rtwpci->tx_rings[RTW_TX_QUEUE_BK].r.len; in rtw_pci_reset_buf_desc()
409 dma = rtwpci->tx_rings[RTW_TX_QUEUE_BK].r.dma; in rtw_pci_reset_buf_desc()
410 rtwpci->tx_rings[RTW_TX_QUEUE_BK].r.rp = 0; in rtw_pci_reset_buf_desc()
411 rtwpci->tx_rings[RTW_TX_QUEUE_BK].r.wp = 0; in rtw_pci_reset_buf_desc()
415 len = rtwpci->tx_rings[RTW_TX_QUEUE_BE].r.len; in rtw_pci_reset_buf_desc()
416 dma = rtwpci->tx_rings[RTW_TX_QUEUE_BE].r.dma; in rtw_pci_reset_buf_desc()
417 rtwpci->tx_rings[RTW_TX_QUEUE_BE].r.rp = 0; in rtw_pci_reset_buf_desc()
418 rtwpci->tx_rings[RTW_TX_QUEUE_BE].r.wp = 0; in rtw_pci_reset_buf_desc()
422 len = rtwpci->tx_rings[RTW_TX_QUEUE_VO].r.len; in rtw_pci_reset_buf_desc()
423 dma = rtwpci->tx_rings[RTW_TX_QUEUE_VO].r.dma; in rtw_pci_reset_buf_desc()
424 rtwpci->tx_rings[RTW_TX_QUEUE_VO].r.rp = 0; in rtw_pci_reset_buf_desc()
425 rtwpci->tx_rings[RTW_TX_QUEUE_VO].r.wp = 0; in rtw_pci_reset_buf_desc()
429 len = rtwpci->tx_rings[RTW_TX_QUEUE_VI].r.len; in rtw_pci_reset_buf_desc()
430 dma = rtwpci->tx_rings[RTW_TX_QUEUE_VI].r.dma; in rtw_pci_reset_buf_desc()
431 rtwpci->tx_rings[RTW_TX_QUEUE_VI].r.rp = 0; in rtw_pci_reset_buf_desc()
432 rtwpci->tx_rings[RTW_TX_QUEUE_VI].r.wp = 0; in rtw_pci_reset_buf_desc()
436 len = rtwpci->tx_rings[RTW_TX_QUEUE_MGMT].r.len; in rtw_pci_reset_buf_desc()
437 dma = rtwpci->tx_rings[RTW_TX_QUEUE_MGMT].r.dma; in rtw_pci_reset_buf_desc()
438 rtwpci->tx_rings[RTW_TX_QUEUE_MGMT].r.rp = 0; in rtw_pci_reset_buf_desc()
439 rtwpci->tx_rings[RTW_TX_QUEUE_MGMT].r.wp = 0; in rtw_pci_reset_buf_desc()
443 len = rtwpci->tx_rings[RTW_TX_QUEUE_HI0].r.len; in rtw_pci_reset_buf_desc()
444 dma = rtwpci->tx_rings[RTW_TX_QUEUE_HI0].r.dma; in rtw_pci_reset_buf_desc()
445 rtwpci->tx_rings[RTW_TX_QUEUE_HI0].r.rp = 0; in rtw_pci_reset_buf_desc()
446 rtwpci->tx_rings[RTW_TX_QUEUE_HI0].r.wp = 0; in rtw_pci_reset_buf_desc()
509 tx_ring = &rtwpci->tx_rings[queue]; in rtw_pci_dma_release()
620 ring = &rtwpci->tx_rings[queue]; in rtw_pci_xmit()
730 ring = &rtwpci->tx_rings[queue]; in rtw_pci_tx()
752 ring = &rtwpci->tx_rings[hw_queue]; in rtw_pci_tx_isr()