40 	if (bitmask != MASKDWORD) {  in rtl8723_phy_set_bb_reg()
83 	tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD);  in rtl8723_phy_rf_serial_read()
87 		tmplong2 = rtl_get_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD);  in rtl8723_phy_rf_serial_read()
90 	rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD,  in rtl8723_phy_rf_serial_read()
93 	rtl_set_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD, tmplong2);  in rtl8723_phy_rf_serial_read()
95 	rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD,  in rtl8723_phy_rf_serial_read()
134 	rtl_set_bbreg(hw, pphyreg->rf3wire_offset, MASKDWORD, data_and_addr);  in rtl8723_phy_rf_serial_write()
293 					  MASKDWORD) >> 22) & 0x3FF;  in rtl8723_phy_path_a_fill_iqk_matrix()
329 		addabackup[i] = rtl_get_bbreg(hw, addareg[i], MASKDWORD);  in rtl8723_save_adda_registers()
352 		rtl_set_bbreg(hw, addareg[i], MASKDWORD, addabackup[i]);  in rtl8723_phy_reload_adda_registers()
379 			rtl_set_bbreg(hw, addareg[0], MASKDWORD, 0x0b1b25a0);  in rtl8723_phy_path_adda_on()
381 			rtl_set_bbreg(hw, addareg[0], MASKDWORD, pathon);  in rtl8723_phy_path_adda_on()
386 		rtl_set_bbreg(hw, addareg[0], MASKDWORD, pathon);  in rtl8723_phy_path_adda_on()
390 		rtl_set_bbreg(hw, addareg[i], MASKDWORD, pathon);  in rtl8723_phy_path_adda_on()
411 	rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x0);  in rtl8723_phy_path_a_standby()
412 	rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00010000);  in rtl8723_phy_path_a_standby()
413 	rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000);  in rtl8723_phy_path_a_standby()
422 	rtl_set_bbreg(hw, 0x820, MASKDWORD, mode);  in rtl8723_phy_pi_mode_switch()
423 	rtl_set_bbreg(hw, 0x828, MASKDWORD, mode);  in rtl8723_phy_pi_mode_switch()