368 	val32 = rtl8xxxu_read32(priv, REG_TX_AGC_A_CCK1_MCS32);  in rtl8723b_set_tx_power()
373 	val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11);  in rtl8723b_set_tx_power()
525 	val32 = rtl8xxxu_read32(priv, REG_PAD_CTRL1);  in rtl8723bu_phy_init_antenna_selection()
529 	val32 = rtl8xxxu_read32(priv, REG_GPIO_MUXCFG);  in rtl8723bu_phy_init_antenna_selection()
533 	val32 = rtl8xxxu_read32(priv, REG_GPIO_MUXCFG);  in rtl8723bu_phy_init_antenna_selection()
537 	val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);  in rtl8723bu_phy_init_antenna_selection()
541 	val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);  in rtl8723bu_phy_init_antenna_selection()
545 	val32 = rtl8xxxu_read32(priv, REG_RFE_BUFFER);  in rtl8723bu_phy_init_antenna_selection()
549 	val32 = rtl8xxxu_read32(priv, REG_RFE_CTRL_ANTA_SRC);  in rtl8723bu_phy_init_antenna_selection()
554 	val32 = rtl8xxxu_read32(priv, REG_PWR_DATA);  in rtl8723bu_phy_init_antenna_selection()
564 	path_sel = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH);  in rtl8723bu_iqk_path_a()
569 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_iqk_path_a()
606 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_iqk_path_a()
642 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_iqk_path_a()
647 	reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);  in rtl8723bu_iqk_path_a()
648 	reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A);  in rtl8723bu_iqk_path_a()
649 	reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A);  in rtl8723bu_iqk_path_a()
674 	path_sel = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH);  in rtl8723bu_rx_iqk_path_a()
679 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
716 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
752 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
757 	reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);  in rtl8723bu_rx_iqk_path_a()
758 	reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A);  in rtl8723bu_rx_iqk_path_a()
759 	reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A);  in rtl8723bu_rx_iqk_path_a()
782 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
820 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
851 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
856 	reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);  in rtl8723bu_rx_iqk_path_a()
857 	reg_ea4 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_A_2);  in rtl8723bu_rx_iqk_path_a()
905 	u8 xa_agc = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1) & 0xff;  in rtl8723bu_phy_iqcalibrate()
906 	u8 xb_agc = rtl8xxxu_read32(priv, REG_OFDM0_XB_AGC_CORE1) & 0xff;  in rtl8723bu_phy_iqcalibrate()
927 	val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING);  in rtl8723bu_phy_iqcalibrate()
939 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
960 			val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
964 			val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
967 			val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
981 			val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
984 			val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
1003 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
1008 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
1019 				val32 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_B);  in rtl8723bu_phy_iqcalibrate()
1021 				val32 = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_B);  in rtl8723bu_phy_iqcalibrate()
1033 				val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
1036 				val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
1049 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
1066 		val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);  in rtl8723bu_phy_iqcalibrate()
1072 			val32 = rtl8xxxu_read32(priv, REG_OFDM0_XB_AGC_CORE1);  in rtl8723bu_phy_iqcalibrate()
1106 	bt_control = rtl8xxxu_read32(priv, REG_BT_CONTROL_8723BU);  in rtl8723bu_phy_iq_calibrate()
1226 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723bu_active_to_emu()
1298 		val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1313 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1318 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1323 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1328 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1333 		val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1434 	val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);  in rtl8723bu_power_on()
1493 	val32 = rtl8xxxu_read32(priv, REG_RX_WAIT_CCA);  in rtl8723b_enable_rf()
1537 	val32 = rtl8xxxu_read32(priv, REG_PWR_DATA);  in rtl8723b_enable_rf()
1546 	val32 = rtl8xxxu_read32(priv, REG_RFE_BUFFER);  in rtl8723b_enable_rf()
1552 	val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);  in rtl8723b_enable_rf()
1614 	agg_rx = rtl8xxxu_read32(priv, REG_RXDMA_AGG_PG_TH);  in rtl8723bu_init_aggregation()
1632 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_init_statistics()
1636 	val32 = rtl8xxxu_read32(priv, REG_NHM_TH9_TH10_8723B);  in rtl8723bu_init_statistics()
1640 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_FA_RSTC);  in rtl8723bu_init_statistics()